Computer Architecture 2024: Term Project

You must provide the materials and demonstrate to the lecturer before Jan 23, 2025

Fill in the table for your term project

• Send email to <[e-mail]> to confirm the details and expectations.
• Numbers denote the expected sizes of the teams, and you should replace them with your name(s) if you are about to take the task.
• Reference: Terms projects for 2023, Terms projects for 2022, Terms projects for 2021

Group	Topic	HackMD note
陳孟鴻	rv32emu system emulation via JIT compilation	rv32emu
林志懋	superscalar out-of-order 64-bit RISC-V core capable of booting Linux	soomrv64
林子齊	5-stage pipelined RISC-V processor capable of running FreeRTOS	pipelined-processor
邱繼寬	Fast usermode x86-64 emulator for RISC-V	box64
黃啟維	Matrix Multiplication Accelerator implemented with Chisel	matmul
蔡承璋, 張恩祥	5-stage pipelined RISC-V processor with RV32IMC	pipelined-processor
林濤	Digital signal processing and Optimization	dsp
洪至謙, 曾遠哲	RVV-accelerated Image Codec	qoi-rvv
陳昭詣, 周姵彣	Port xv6-riscv to 32-bit RV32I core	xv6-rv32i
曹為廷	Annotate and explain Quiz 1 to 5	quiz1to5
章元豪	Extend tiny-gpu	tinygpu
洪翊碩	Convolutional Neural Network Accelerator implemented in Chisel	cnn-accel
姜冠宇	3-stage pipeplined RV32 core with B extension	rv32b
陳乃宇, 陳冠霖	Implement Vector extension for rv32emu	rv32emu-rvv
許翰翔, 簡德彥, 吳秉宥	Implement dynamic branch prediction for pipelined RISC-V processor	dynamic-branch-prediction
李宗翰, 洪靖睿	RVV-accelerated Audio Codec	qoa-rvv
陳禹丞	Refine system emulation for rv32emu	rv32emu-sys
陳榮昶, 林晉德	Implement cache system for srv32	srv32-cache
黃若綾, 蔡雅彤, 林靖婷	Extend PicoRV32	picorv32
蘇暐倫	Rework Neural Networks with low bit weights on Venus	nn-venus
蘇湘婷	WebAssembly based Linux/RISC-V System Emulation	rv32emu-wasm
唐文駿	Execution visualization for rv32emu	rv32emu-vis
王景霈, 傅孟楷	Multi-threading on top of 'Operating System in 1,000 Lines'	threading
劉益祥	Optimization Design of CORDIC Algorithm	cordic
余紹桓, 郭子敬	Performance tuning for Quake/rv32emu	quake
陳彥廷	RV32IM core running FreeRTOS	rv32-rtos
黎詠哲, 李協儒	Dynamic library support for shecc	shecc
陳致翰, 孫禾洵	Enhance visualized RISC-V simulation	emulsiV
王彥珽	RV32IMC core	rv32imc
丁語婕, 鄭煦霖, 王信智	FreeRTOS SMP	freertos-smp
黃詠筑, 劉欣宜	Build RISC-V Instruction Set Simulator from scratch	simulator
林趺菩	Evaluate NucleusRV	NucleusRV
陳柏儒	Speed up rv32emu interpreter	rv32emu-int
程品叡, 吳睿秉	Cache system for NucleusRV	cache
謝廷昇, 王晴文	Accelerate Fast Fourier Transform	fft
鄭九彰	rv32 core	rv32
黃士昕	Implement Vector extension for rv32emu	rv32emu-rvv
郭君瑋	ChiselRiscV	rvcore
阮祈翰	Improve window system for RISC-V	window
蔡文賓	Improve rv32emu performance	rv32emu-perf
徐崇智, 邱家浩, 林育丞	RISC-V Hypervisor	hypervisor
郭昱辰, 簡子昕	Pixel-art scaling Accelerator in Chisel	pixelart
侯廷錡	Evaluate tiny-gpu	tiny-gpu
湯秉翰	5-Stage Pipeline Processor in Chisel	pipeline
宋唯廷, 劉孟璋	RV32C support for srv32	rv32c
吳哲郁	Minimal RISC-V core to boot Linux	linux
饒胤琛	Pipelined RISC-V in Chisel	pipeline
賴傑南	Construct RISC-V in Chisel	rvcore
邱柏穎, 黃詩哲	Branch prediction for 5-stage pipelined RISC-V	branch-predict
蕭郁霖, 徐向廷	Construct RISC-V in Chisel	rvcore
李懿宸	Evaluate BitNet inference	bitnet
陳侯華	AES Implementation in Chisel	aes-chisel
葉人豪	Cache simulation and case study	cache
曾謙文	Annotate and explain Quiz6 and 7 with additional challenge Problems	quiz67
蔡承遠, 郭晏愷	Implement RV32F	rv32f
蕭維昭, 吳柏漢	Extend riscv-mini	riscv-mini
莊易騰	SMP OS Kernel for RISC-V	smp-os
黃書堯	Optimize sqrtf without FPU	sqrtf
吳彥廷	Trace and Analyze Memory Allocators in FreeRTOS	mem
李建佑	Evaluate KianV	KianV
廖奕凱	Vectorize Quite OK YCbCr420A	qoy-rvv
方榮彬, 龔祐萱	Hardware Generator for JPEG Compression	jpeg
傅信豪	Hardware Ray Tracer Datapath	raytracer
李尚宸	Single-cycle RISC-V core	rvcore
盧尚毅	5-stage pipeline RISC-V core	pipeline
吳中玄	Minimal OS Kernel for RISC-V	os
蕭力文	single-cycle RISC-V	rvcore
劉哲維	5-stage pipeline RISC-V core	pipeline
陳奕嘉	Case Study on Performance Improvements	perf
章劉軒瑋	Custom RISC-V instructions to Accelerate LLM Inference	custom
柳嘉祐	5-stage pipeline RISC-V core	rvcore
王韻茨, 王柏皓	Implement RISC-V core	rvcore
戴均原	Pipelined RISC-V core	pipeline
李皓翔	Pipelined RISC-V core	pipeline
黃守維	RV32 support for Tina coroutine	coroutine
陳家揚	Ethernet device implemented in Chisel	eth
黃灝	Cache simulation for various matrix operations	cache
李漢德	Multithreading for RISC-V	threads
黃丞漢, 江冠德	Pipelined RISC-V core with RV32IMZbaZbbZbcZbs	rv32imb