--- tags: computer-arch --- # Assignment3: SoftCPU > Due: ==Nov 30, 2022== ## Requirements 1. Following the instructions of [srv32 - RISCV RV32IM Soft CPU](https://hackmd.io/@sysprog/S1Udn1Xtt), you shall modify the assembly programs used/done with [Assignment2](https://hackmd.io/@sysprog/2022-arch-homework2) and another [LeetCode problem with medium difficulty](https://leetcode.com/problemset/algorithms/?difficulty=Medium) for [srv32](https://github.com/sysprog21/srv32) Simulation with Verilator. * In other words, you need to prepare at least two RISC-V programs, one of which should be derived from [Assignment2](https://hackmd.io/@sysprog/2022-arch-homework2) and the other from scratch. We need a medium-difficulty LeetCode problem because we are ready to make aggressive optimizations. * The programs for [Assignment2](https://hackmd.io/@sysprog/2022-arch-homework2) were tweaked for single-cycle RV32I core. However, [srv32](https://github.com/sysprog21/srv32) has 3-stage pipeline, and you should rework the existing code to benefit from CPU pipelining. * [dhrystone](https://github.com/sysprog21/srv32/tree/devel/sw/dhrystone) is a good starting point for writing test cases. * You should validate the results in your program(s). * You should program in RISC-V assembly for the sake of further optimizations. Hint: You may modify a customized `Makefile` for building C and assembly source files from scratch. 2. Check the generated file `wave.fst` and use GTKwave to view the waveform. Then, explain how your program is executed along with [srv32](https://github.com/sysprog21/srv32) Simulation. * Show the signals/events inside [srv32](https://github.com/sysprog21/srv32) associated to PC, branch, instruction memory (`I-MEM`), data memory (`D-MEM`), and instruction internals. * You shall discuss pipeline architecture along with your program. 3. Propose the software optimizations (against your program) based on the pipeline design of [srv32](https://github.com/sysprog21/srv32). + fewer instructions + shorter cycle counts + eliminate unnecessary stalls + more deterministic branches 4. Write down your thoughts and progress in [HackMD notes](https://hackmd.io/s/features). * Explain how [srv32](https://github.com/sysprog21/srv32) works with [Verilator](https://www.veripool.org/wiki/verilator). * You should check Intel FPGA traning video **[Verilog HDL Basics](https://youtu.be/PJGvZSlsLKs)** and [Verilog Tutorial](https://www.csie.ntu.edu.tw/~b97067/verilog_tutorial.pdf). * BONUS: Can you figure out the room to improve [srv32](https://github.com/sysprog21/srv32)? ## Fill in the table for your homework | Formal given name | HackMD note | | ----------------- |:----------------------------------------------------------------------- | | Sample1 | [Homework3](https://hackmd.io/@jackli/arch_hw3) | | Sample2 | [Homework3](https://hackmd.io/@chinghongfang/HJuNqq-cF) | | Sample3 | [Homework3](https://hackmd.io/@_UHs74UQS7uNne9_7SwQFQ/S113vvkct) | | Sample4 | [Homework4](https://hackmd.io/@E4b6eQ9-RWSAX-9mP_FLhA/HJwz8FgOK) | | 王昱承 | [Homework3](https://hackmd.io/@zKOCm3SSTKyUyiPV-nfEjw/ry8RRQJ8s) | | 黃昱澄 | [Homework3](https://hackmd.io/l6u4WbR0RRyCm0VTxlX92g?both) | | 俞杉麒 | [Homework3](https://hackmd.io/@XiaXia/ComputerArchitecture_Hw3) | | 賴致文 | [Homework3](https://hackmd.io/4pEhXAtXQ2CKJndmvorO3g?view#Lab3-SoftCPU) | | 陳彥甫 | [Homework3](https://hackmd.io/@qwe661234/SybxYGTLj) | | 黃冠予 | [Homework3](https://hackmd.io/@ZLQisilvQvOh2DclLmk1bg/BJPi5r1ws) | | 江坤諦 | [Homework3](https://hackmd.io/@chiangkd/assignment3) | | 洪嘉志 | [Homework3](https://hackmd.io/BiacyJ5_ScS-TYdaxxz7QA) | | 曾晧峖 | [Homework3](https://hackmd.io/@tseng0201/r1orNmcLo) | | 王漢祺 | [Homework3](https://hackmd.io/@wanghanchi/H1AxxO9ri) | | 陳品崴 | [Homework3](https://hackmd.io/EDRxETipRJ6c5dYv2sPa5Q) | | 黃榆哲 | [Homework3](https://hackmd.io/1mWb3A5PT1CNEeNK_ntOVg) | | 吳紀寬 | [Homework3](https://hackmd.io/qgUBcEvdTuWzV78Y1OLfYA) | | 張瑞甫 | [Homework3](https://hackmd.io/lMHf_NxVQGeO-VRIYvUV5w) | | 陳韋勳 | [Homework3](https://hackmd.io/FDg6s_TdT6WEXlUYjjdFEg?view) | | 張中龍 | [Homework3](https://hackmd.io/@ncxDr8I_QguW3tkdtqgZ-Q/HkQFpw1vj) | | 周士翔 | [Homework3](https://hackmd.io/@zDmciYQATNm-8XeyJ5Th0Q/SJWknv7wo) | | 陳奕萍 | [Homework3](https://hackmd.io/@P76111482/Sk7sAfsIi) | | 蘇勇達 | [Homework3](https://hackmd.io/@myYWbxM9QWib1raZDkkqyw/HyltZP7Pi) | | 莊集 | [Homework3](https://hackmd.io/@y8jRQNyoRe6WG-qekloIlA/ryoNV5Qvi) | | 何坤霖 | [Homework3](https://hackmd.io/@dgKSmDN0T_quhIoU9NVThA/SJGcroxvo) | | 潘鴻福 | [Homework3](https://hackmd.io/lD4VjSxhQfmolUCDUbRpXA) | | 方宣翔 | [Homework3](https://hackmd.io/iNBiD3DpSR6pGaNHK2G8wA) | | 黃柏瑜 | [Homework3](https://hackmd.io/@maromaSamsa/ByLKE_VDj) | | 馮柏為 | [Homework3](https://hackmd.io/@r1YLxwFRRPe1xninh0Ma6w/B1arUdXDj) | | 吳宇晨 | [Homework3](https://hackmd.io/CoRkdRHJS3W4EQPk3wkyZg) | | 鄭至崴 |[Homework3](https://hackmd.io/@Fo7UsdePRsKPVV4CPYGbpA/rydAP0OSo) | | 楊淳皓 | [Homework3](https://hackmd.io/@Vgwl_uixQFasIvsDbsFlvA/risc-v-hw3) 陳靖雯|[Homework3](https://hackmd.io/UQ9u6ymdROuoTxXdTf0R_w?both)