# [VLSI Computer-Aided Design for VLSI Design](https://hackmd.io/@NTNUCSIE112/VLSI110-1_0)
NTNU VLSI 電腦輔助設計
:arrow_right: [Moodle](https://moodle3.ntnu.edu.tw/course/view.php?id=22039)
##### [Back to Note Overview](https://reurl.cc/XXeYaE)
{%hackmd @sophie8909/pink_theme %}
###### tags: `VLSI` `110-1` `CSIE` `選修` `NTNU`
<!-- tag順序 [課程] [系 必選] or [學程 學程名(不含學程的 e.g. 大師創業)][學校] -->
## [Ch.01 Introduction to VLSI Design](https://hackmd.io/@NTNUCSIE112/VLSI110-1_1)
## [Ch.02 VHDL-Basic Elements and Dataflow](https://hackmd.io/@NTNUCSIE112/VLSI110-1_2)
## [Ch.03 VHDL-Behavior and Structural](https://hackmd.io/@NTNUCSIE112/VLSI110-1_3)
## [Ch.04 VHDL-Advanced](https://hackmd.io/@NTNUCSIE112/VLSI110-1_4)
## [Ch.05 Registers, Counters and Finite State Machines](https://hackmd.io/@NTNUCSIE112/VLSI110-1_5)
## [Ch.06 MIPS Design](https://hackmd.io/@NTNUCSIE112/VLSI110-1_6)
## [Ch.07 Programmable Logic and Storage Devices](https://hackmd.io/@NTNUCSIE112/VLSI110-1_7)
## [Ch.08 Area, Speed and Power Performance for Programmable Logic Devices](https://hackmd.io/@NTNUCSIE112/VLSI110-1_8)
## [Ch.09 Test Bench Design](https://hackmd.io/@NTNUCSIE112/VLSI110-1_9)
## Verilog (Chap. 10, 11)
## VLSI Realization of Digital Filters (Chap. 12, 13)
## Standard Cell Design (Chap. 14)
{"metaMigratedAt":"2023-06-16T13:30:44.618Z","metaMigratedFrom":"Content","title":"[VLSI Computer-Aided Design for VLSI Design](https://hackmd.io/@NTNUCSIE112/VLSI110-1_0)","breaks":true,"description":"NTNU VLSI 電腦輔助設計 Moodle","contributors":"[{\"id\":\"825db5c4-8eb9-4944-8772-d130a3d519a1\",\"add\":689,\"del\":266},{\"id\":\"343b33b3-34ea-4048-8e2f-129ef7e61e88\",\"add\":859,\"del\":0}]"}
tags: VLSI
110-1
CSIE
選修
NTNU
Verilog (Chap. 10, 11)
VLSI Realization of Digital Filters (Chap. 12, 13)
Standard Cell Design (Chap. 14)