Computer Archiecture 2020: Term Project

You must provide the materials and demonstrate to the lecturer before Jan 19, 2021

Fill in the table for your term project

Terms projects for 2019

Group(add your name here)	Topic	Your Links
段雅培	Implement RISC-V compressed instruction support for rv32emu-next. Reference: RISC-V Compressed Instruction Set on rv32emu	Implement RISC-V compressed instruction support for rv32emu-next / PR on Github
江松穎, 洪邵澤	Implement RISC-V compressed instruction support for rv32emu-next. Reference: RISC-V Compressed Instruction Set on rv32emu	RISC-V Compressed Instruction Support for rv32emu-next / github
3 汪宗諺 吳昱宗	Run FreeRTOS on VexRiscv and access the peripherals such as VGA. Reference: VexRiscv	Run FreeRTOS on VexRiscv and access the peripherals
3	Analyze PulseRain Rattlesnake: Explain how it works and validate it.	-
1 曾鈜寬	Contribute RV32C support back to Reindeer. You must send pull request(s) and collaborate with upstteam. Reference: Implement RISC-V Compressed Instruction Set for Reindeer	-
2+ 許龍君, 楊承翰, 陳柏廷	Contribute to Ripes: pick up pending issues, work on them, and finally send pull request(s).	Add instruction formats to assembly error tooltip
鄭育丞	Implement RV32I backend for shecc	shecc backend summary
1 魏晉成 林柏維	Analyze ria-jit and contribute	Analyze ria-jit and Contribute
3 呂紹樺, 林霆寬	Analyze minrv32 and verify its internals	Analyze minrv32 and verify its internals
3 鄭惟, 謝宜紘, 王傑世	Analyze and improve srv32 MIT	Analyze and improve srv32
3	Analyze spu32 with Yosys open synthesis suite. Explain how it works and validate it.	-
陳冠宇	Annotate and explain Quiz3	Quiz3
江承緯	Annotate and explain Quiz3	Quiz3
施丞宥	Annotate and explain Quiz4	Quiz4
夏晨鈞	Annotate and explain Quiz4	Quiz4
林楷倫	Annotate and explain Quiz5	Quiz5
曾紹銘	Annotate and explain Quiz5	Quiz5
徐郁淞	Annotate and explain Quiz6	Quiz6