# Term Project

## Fill in the table for your term project

| Group | Topic | Your Links |
| --------------------------- | ------------------------------------------------------------------------------------------------------------------------------------------ | ---------- |
| 黃俞紘 林家葦 曾士峰 潘家瑞 | Implement RISC-V Compressed Instruction Set for Reindeer, based on pull request RV32C support. must be validated on Step CYC10 FPGA board. |[Implement RISC-V Compressed Instruction Set for Reindeer](https://hackmd.io/QldsCYzJRJ2AoXDkT7Pd9A) |
| 黃偉宸 戴宏諺 張家銘 | Implement RISC-V Compressed Instruction Set on rv32emu. |[Implement RISC-V Compressed Instruction Set on rv32emu](https://hackmd.io/@kksweet8845/rv32emu) |
| 周沛辰 黃瀚群 林聖堯 王昱翔 | Analyze VexRiscv. Explain how it works and validate it. |[Analyze VexRiscv. Explain how it works and validate it.](https://hackmd.io/OrRuhUSMTrqUlpe3Lsjv6Q) |
| 張淳勉 李佶龍 | Explore the workings of virtual memory, specifically the TLB and the Page Table. | [Explore the workings of virtual memory, specifically the TLB and the Page Table](https://hackmd.io/g1SEMC1vQt2_Zt70uopI7g) |