Yi Chen
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    # Homework Readings contributed by <`ChenYi`> ## 閱讀文件 筆記一下我比較有興趣的部分 ### Modern Microprocessor - A 90-minute Guide <[文章連結](http://www.lighterra.com/papers/modernmicroprocessors/)> > Thema > - feature > - - property [name=`chenyi`] * Superscalar * Be able to make CPI<1 * 在execution stage中的,因為各個function units執行的工作互不相干,可做平行化。 * e.g. 同時執行integer , float , memory instructions * ![](https://i.imgur.com/nBvZbtN.png) * Explicit Parallelism - VLIW * 把多個指令包成一組,然後以平行的方式去執行 * 不會確認各指令的相依性 * compiler要幫忙插入no-operation * Bracnch Prediction * 原本目的是減少fetch和decode的時間,讓處理器去猜branch的結果是甚麼 * 好處是猜對了就上天堂,猜錯了就要照著branch的結果去fetch和decode,前面的要洗掉重讀,造成時間上的浪費。 * 重點就再怎麼猜,有兩種方法 * 讓compiler去告訴processor要去哪 * static branch prediction * 讓processor在執行時期自己猜 * 通常會在晶片上記錄之前branch去過哪 * 雖然占空間,但他的確有這個價值 * 但即便是高準度的猜測,一旦猜錯還是會付出很大的代價 * e.g.像過去的Pentium pro/II/III一猜錯就要付出30%額外的時間 * * Instruction Scheduling, Register Renaming & OOO * Instruction Scheduling的目的就是塞好塞滿,盡量不要出現bubbles * 在執行時期重新排列指令的順序(dynamic instrucitoin scheduling) * OoO(Out-of-Order)亂序的去執行指令 * 重新命名暫存器,確保相依性的問題 * 缺點是processor要去記誰mapping到哪個實體暫存器上,會很占空間 * 很吃電,因為mapping的table是一直都要作用的,不像fuctional units一樣有機會只用到一部分。 * 所以只有講求高效能的處理器,會使用亂序排序,而像嵌入式裝置的處理器一般都會為了省電而使用低功耗的順序排序處理器。 * 另外的方法就是交給編譯器,在編譯時期就做好排序 * What about x86? * dynamically decode x86 instruction into simple , RISC-like micro-instructions * 可以在RISC-style register-renaming OOO superscalar core上執行 * ![](http://www.lighterra.com/papers/modernmicroprocessors/riscyx862.png) * 有些更近代的處理器會將轉換過的micro-instructions儲存在"L0" instruction cache裡,來避免一再得去轉換 * L0 μop可以達到14-stages,而L1的則要19-stages(其中包含轉換的過程) * SMT,Hyper-Threading & Multi-Core * 因為受限於大部分程式不會需要非常多個指令同時平行處理,且他們會有load latencies , cache misses , branching,等問題,在同一個processor裡單純去提高IPL是有其極限的。 * SMT(Simultaneous multi-threading) * 為了解決單一程式使用的IPL不需要如此高,那麼就一次多跑一點(一個吃不飽,你有沒有吃兩個?) * SMT的行為就會像是同時擁有多顆core的系統一樣,但SMT processor是用single physical processor去模擬多個logical processor(instruction-level parallelism) * 使用SMT processor的假設是,有很多不易平行化的thread或process同時需要執行,並且沒有人在發呆 * 實作時會把該記的記下來(PC,TLB,excution state裡面的東西...) * 共用functional units和caches * 將thread-level parallelism 轉換成 instruction-level parallelism * 好處是可以節省很多空間,能源,和成本 * 但缺點是單一thread的效能有限(共享資源),簡單來講就是很醜的平行化,容易做到平行運算的像是CG,database...等的程式就不適合SMT,因為在單一thread受限時,反而會導致效能低落。 * ![](http://www.lighterra.com/papers/modernmicroprocessors/smt2.png) * Data Parallelism – SIMD Vector Instructions * Single Instruction , multiple data , often used in vector processing * SSE , AVX in x86 >> 之前作業就有開始用了,那邊有筆記 [name=`chenyi`] * Memory Wall * slow speed of chargin and drainning of capacitors * long memory bus cycles

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