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Analyze rv32emu
contributed by <
weishiuan
>Goal
Building on sammer1077's contributions, the objective is to ensure rv32emu-next successfully passes the riscv-arch-test. This involves:
Arch-Test
The RISC-V architecture test ensures a CPU model meets the RISC-V specification:
After compiling and running tests, find the ELF files in riscv-arch-test/work/C directories. Use
riscv-none-embed-objdump -D
to get more information.Test Points
Compliance Test checks specific instructions for functionality and decode correctness. Ensure correctness of results, x0 cannot be modified, and decode correctness. Any difference in the signature leads to test failure.
Standard Instruction for Compressed Instruction
Compressed instructions are shorter in special cases:
The C-extension is compatible with other standard instructions and is interleaved with the 16-bit boundary.
Progress on Pull Request (PR#3)
Failed tests:
These tests are not supported by Compute Goto implementation.
RV32C Compatibility with Other Instruction Sets
Any instruction fetched by rv32emu-next can be checked for the last 2 bits:
Implementation Example
Debug with Compliance Test
After running the compliance test, check and record each failed instruction. Go to the work directories in
riscv-arch-tests
and find the corresponding .elf and .diff files..diff
illustrates the differences in test signature and reference signature..elf
can be opened withriscv-none-embed-objdump -D
to get the instruction of the test code.Run ./rv32emu –trace FailInstructionTest.elf to trace the runtime information. Check each line, especially the test instruction. Manually calculate and compare the result to your printed message. If something is wrong, find the position of the error code based on the conclusion.
Note that some instruction tests will use another instruction; ensure correctness in other instruction usage.
Example - Fixing Arithmetic Error in c.lui
c.lui
c.jalr
c.jalr expands to jalr x1, 0(rs1). Special part in the test code:
Error Parts
Directly save Next PC to ra and jump to the instruction line to x's value:
Corrected Parts
Use a variable
(rs_value)
to store the value in register x, save the Next PC to ra, and jump tors_value
line:Optimizing Control Flow with Compute Goto in RV32C Integration
Compute Goto in rv32emu-next
In the rv32emu-next project, Compute Goto is utilized after all instruction calls, employing a unified DISPATH process. Despite the absence of reused code, the use of defined macros streamlines program maintenance. The implementation involves defining the macro
op_xxxx
to ensure all instruction handlers have unique jumps, which are not shared.This approach significantly improves the speed of rv32emu-next by enhancing the branch prediction of the program itself, rather than the RISC-V model's branch prediction.
Integration of Compute Goto with RV32C
To integrate Compute Goto with RV32C, several components are prepared:
Jump table
A table storing pointers to functions is created to facilitate efficient dispatching.
DISPATCH
This component checks whether the CPU has halted or if the trace cycle meets the target. It then fetches the instruction and determines whether it is compressed or uncompressed, adjusting the instruction length accordingly.
EXEC
The EXEC component remains unchanged. It dispatches the opcode and increments the cycle counter.
TARGET
This part ensures instruction fetching after handling the instruction.
Pull Request
The project is currently in a pull request stage. Extensive modifications are planned in the commit messages based on the reviewer's advice. The team is committed to delivering the best results by the end of the project.
The above are outdated. Did you figure out how to simulate the RISC-V instructions along with the extensions yet?
Conclusion
This project focuses on integrating RV32C, contributed by ccs100203 and Uduru0522, with Compute Goto in rv32emu-next. RV32C, a part of the Standard extension for compressed instructions, optimizes instruction length based on specific conditions. Compliance test considerations include ensuring correct instruction functionality and checking for any "reserved" or "HINT" decode results. The Compute Goto technique enhances branch prediction accuracy by maintaining independently predicted jumps.