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tags: MQI, Readout
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# Single Flux Quantum Readout

## 1. Josephson Junctions

### 1.1 Theory Summary

Some relevant formulas and concepts. Thought as a refresher if you already know something about Josephson Junctions and RF SQUIDs. For more in depth understanding I find this WMI script to be a good reference: [Applied Superconductivity](https://www.wmi.badw.de/teaching/lecture-notes#:~:text=wmi.badw.de.%C2%A0-,Applied%20Superconductivity,-Lecture%20Notes%20of)

#### What happens if we weakly couple two superconductors?


Cooper pairs can tunnel through a thin insulating barrier between two superconductors. The expected tunnelling rate for individual electrons is extremely small, but because of the coherent tunneling of Cooper-pairs (Tunneling of the macroscopic wave function), the probability is higher and becomes relevant. From this also the Josehpson effects of finite supercurrent at zero applied voltage and oscillating supercurrent at constant applied voltage originates.

#### Quantum Currents in Superconductors

- The macroscopic wave function $\psi(r,t) = \sqrt{n_s(r,t)} \cdot e^{i\theta(r,t)}$ describes the whole ensemble of superelectrons with $n_s(r,t)=|\psi(r,t)|^2$ the electron density
- The current-phase relation (supercurrent equation) is
$J_s = q_s n_s \left(\frac{\hbar}{m_s}\nabla \theta(r,t) - \frac{q_s}{m_s}A(r,t) \right) = q_s n_s v_s$
- The energy-phase relation is
$\hbar \frac{\partial \theta}{\partial t}=\frac{1}{2n_s}\Lambda J_s^2 + q_s \phi$

#### Josephson Equations

- Current-Phase relation: $J(\varphi)=J_csin(\varphi)$

The supercurrent density varies sinusoidally with $\varphi = \theta_2 − \theta_1$ without external potentials.

- Voltage-Phase relation: $\frac{\partial \varphi}{\partial t} = \frac{2\pi}{\phi_0} V$

#### Current Voltage Characteristics


### 1.2 Nanofabrication of Josephson Junction Circuits

#### Materials for JJs

- Nb
- Type-II superconductor, $𝑇_c$ ≈ 9K
- Fast measurements at 4K possible
- Trilayer Deposition of Nb/Al-AlOx/Nb
- Shadow evaporation for nanoscale junction **not possible?** -> ~$10µm^2$ JJs
- Al
- Type-I superconductor, $𝑇_c$ ≈ 1.5K
- Measurements require millikelvin temperatures
- Shadow evaporation possible (stable oxide) -> Submicron JJs

-> For us Nb/Al-AlOx/Nb Josephson Junctions will probalby be the way to go, mainly because of the operating temperature and because we do not need sub-micron JJs (WMI folks will know better). Here can be found a detailed description for the technological development of [High Quality Nb/Al-AlOx/Nb Josephson Junctions](https://publikationen.bibliothek.kit.edu/1000022422/1777954)

#### Trilayer Deposition ($10µm^2$ Nb/Al-AlOx/Nb JJs)

- Nb/Al-AlOx/Nb trilayer is created in a DC magnetron sputtering system with layer thicknesses i.e. of 200 nm (lower Nb electrode), 7 nm (Al) and 100 nm (top Nb electrode)
- Then, the Josephson junctions are defined by positive photolithography and reactive-ion-etching (RIE)
- A first insulating layer is created using the same resist mask by anodic oxidation (yellow layer)
- The bottom electrode is defined by positive photolithography and subsequent RIE. Here an intermediate ion beam etching (IBE) step is necessary because the AlOx layer cannot be etched by RIE
- Negative photolithography and thermal evaporation of SiO are employed to create the second insulating layer
- The wiring layer is defined by negative photolithography and DC magnetron sputtering of Nb.


a) As-deposited trilayer b) After junction definition and anodic oxidation c) After patterning of bottom electrode d) With deposited SiO insulation layer e) Final structure with wiring layer.

#### Shadow Evaporation (Sub-Micron Al/AlOx/Al JJs)

The Key fabrication technique for Al/AlOx/Al Josephson junctions with submicron lateral dimensions is the so called **Shadow Evaporation** Technique

- Two layers of resist are applied
- Part of the first resist layer is removed to create a cavity for evaporation
- The first layer of superconductor is evaporated at the angle $\varphi$
- Oxidation of the first layer to create a think isolating barrier
- Second layer of superconductor is evaporated at angle $-\varphi$




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## 2. RSFQ Logic

### 2.1 Summary

- Acronym for rapid single flux quantum logic
- Clock frequencies above 100 GHz -> Very Fast
- Non-Latching logic (in contrast to Switching Josephson logic)
- Based on overdamped Josephson junctions
- Low power consumption ≃ 10e−18 J/bit

### 2.2 Working Principle

If an overdamped junction is biased with a current slightly larger than the critical current, the Josephson current has the form of short pulses with the pulse duration being of the order of $\frac{Φ_0}{I_cR_N}$. For a typical $I_cR_N$ product of 1 mV the pulse duration is only 2 ps. During a single pulse the phase difference across the Josephson junction evolves by 2π. According to the 2. Josephson equation ($\Phi' /2π = V/\phi_0$) this means that the phase change results in a short voltage pulse with $\int V dt = \Phi_0$.

(See again [Applied Superconductivity](https://www.wmi.badw.de/teaching/lecture-notes#:~:text=wmi.badw.de.%C2%A0-,Applied%20Superconductivity,-Lecture%20Notes%20of) Chapter 5 for a better introduction)


### 2.3 Basic Components of RSFQ Circuits

#### RSFQ pulse Generator - single JJ

- By biasing an overdamped JJ sightly above 𝐼c we can achieve a RSFQ pulse train that acts as a natural clock for the RSFQ logic cicruit.
- Pulse durations of $\frac{\phi_0}{2I_cR} ≈1 ps$ for $I_cR ≈ I_cRN ≈ 1mV$ can be theoretically achieved
- Nb JJ are intrinsically underdamped. Therefore we introduce the shunt resitance on the right, which however makes the **pulses longer & less high**


#### RSFQ pulse Generator - rf SQUID

- **Replace overdamped JJ by rf SQUID** -> no shunt resistor needed
- Hysteretic behavior:
0 → 1 transition at $𝐼_{contr}$ = $𝐼_{c1}$
1 → 0-transition at $𝐼_{contr}$ = $𝐼_{c2}$
- RSFQ pulse again generated with dc current pulse
- Pulse can be longer at cost of decreased amplitude
- Pulse train can be generated with external RF clock


#### Signal Propagation Elements

| Element | Shematic |
| --------------------------------- | ------------------------------------ |
| Josephson transmission line (JTL) |  |
| Pulse splitter |  |
| Buffer stage |  |

#### RSFQ Memory cell: RS flip-flop register

- Information stored as quantized flux trapped inside the loop
- **Basic Unit of SFQ Logical Circuits**
- With Proper parameters and bias:
- Incoming SFQ pulse at port S (set) triggers flux trapping („0 → 1“-transition)
- Incoming SFQ pulse at port R triggers reset („1 → 0“-transition)
- JR and JS protect input from setting(resetting) a 1(0) state
- During reset, a readout pulse is emitted at port F


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### 2.4 Basic Logic Gates

#### RSFQ OR gate

- Initial clock pulse resets the memory to 0
- One SFQ pulse enters either A or B -> memory cell switches to in state 1
- Pulses in A and B -> First pulse switches memory to 1, second pulse does nothing
- Clock pulse at the end -> Resets memory and generates output pulse if in state 1


#### RSFQ AND gate
- Initial clock pulse resets the memories to 0
- If two SFQ pulse enters A or B at different times -> Memory cells for storage
- Next clock trigger -> Reset memories and release stored pulses simultanelously
- Jc switches only if two pulses add -> Only then SFQ pulse released at port C


#### RSFQ NOT gate

- Initial clock pulse resets the memory to 0
- If no pulse (state 0) enters at port IN
- J2 carries virtually no current
- Next trigger T pulse switches J3
- Output of SFQ pulse (state 1)
- If a pulse (state 1) enters at port IN
- Stored in memory, increasing current through J2
- Next trigger pulse T switches J2 and not J3
- No output of SFQ pulse (state 0)


#### RSFQ shift register

- Upper array acts as JTL transmittion trigger/reset pulses from port IN First in first out (FIFO) memory
- Each Clock Cycle the signal travels one cell


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## 3. SSPD Readout Circuit

The connection between SNSPD and single flux quantum electronics is very natural because voltage level, switching speed and operation temperature are matching perfectly (for Nb/Al-AlOx/Nb JJs). To obtain a high count rate and a high number of detectors at the same time, we require a readout electronics which is able to operate in very close vicinity to the detector itself.
As a result a multi-chip-module (MCM) involving one chip containing the SNSPD and a second chip containing the digital SFQ readout circuit is the goal of our SSPD readout sheme. This enables a very close packaging of the detector and the readout electronics which avoids any long connections between detector and readout electronics.

### 3.1 Sources

- [Demonstration of digital readout circuit for superconducting nanowire single photon detector](https://www.researchgate.net/publication/51659051_Demonstration_of_digital_readout_circuit_for_superconducting_nanowire_single_photon_detector)
- [Readout Circuit Based on Single-Flux-Quantum Logic Circuit for Photon-Number-Resolving SNSPD Array](https://ieeexplore.ieee.org/document/8302924)
- [Readout Electronics Using Single-Flux-Quantum Circuit Technology for Superconducting Single-Photon Detector Array](https://www.researchgate.net/publication/224557754_Readout_Electronics_Using_Single-Flux-Quantum_Circuit_Technology_for_Superconducting_Single-Photon_Detector_Array)
- [Demonstration of single-flux-quantum readout operation for superconducting single-photon detectors](https://aip.scitation.org/doi/pdf/10.1063/1.3484965)
- [Design and Fabrication of All-NbN SFQ Circuits
for SSPD Signal Processing](https://ieeexplore.ieee.org/document/6389749)
- [MODELING JOSEPHSON JUNCTIONS IN LTSPICE FOR USE IN SUPERCONDUCTING SINGLE PHOTON DETECTOR READOUT SYSTEMS](http://www.adamstenson.com/assets/pdf/MS_Thesis.pdf)
- [Real-time multi-pixel readout of superconducting nanowire single-photon detectors](https://ieeexplore.ieee.org/abstract/document/6881019)

#### Illustration of Demonstrator


Illustration of both chips connected by wire bonds (a) and MCM mounted on a brass table (b). Detailed pictures show the central section of the SNSPD (c.) and of the SFQ circuit (d), respectively. The SFQ chip supports four individual input channels, of which only one is used in [this experiment](https://www.researchgate.net/publication/51659051_Demonstration_of_digital_readout_circuit_for_superconducting_nanowire_single_photon_detector).

### 3.2 Operating Principle

- The SFQ digital superconductor electronics family represents the binary data by the presence or absence of single magnetic flux quanta
- Each photon, which gets absorbed by the SNSPD generates a voltage pulse which propagates to the input transformer of the SFQ circuit.
- The transferred voltage pulse gets transformed single magnetic flux quanta in this transfomrer
- These loops are interrupted by Josephson junctions, which act as active switchings elements for a controlled transfer of single flux quanta between different loops of the circuit.

### 3.3 Circuit Design

#### https://github.com/sunmagnetics/RSFQlib
https://arxiv.org/abs/2011.06272
Database for all basic RSFQ components!

#### Shematic diagram of the SFQ circuit with connected SNSPD


#### Magnetically Coupled DC/SFQ Convertor

### 3.4 SNSPD Array Circuit