Layout

Memory as byte per row

Single table for all precompiles

sequence_id	operation	io	length	index	byte
	ECRECOVER SHA256 RIPEMD160 MODEXP ECADD ECMUL ECPAIRING BLAKE2F PAD	INPUT OUTPUT

Each precompile sub circuits will scan through the sequence_id to verify that output == operation(input), and check the boundary of the range are different operation, hence we guarantee that everything in precompile table is correct.

If single sub circuit couldn't verify all input/output pairs in precompile table, we could also adopt any IVC scheme to incrementally scan through them

Taking inputs from the EVM circuit and the flow of operations

We don't really hex the values in the EVM, done in state circuit. Copy circuit will read byte by byte from the state circuit and write it into the precompile table. Until this point, we have no guarantee that everything in the table is correct. THIS is where the precompile subcircuit comes into play.

Per table for each precompile

We can also have per table for ecah precompile, just need to ignore the operation column.

Memory as word per row

Considering we might want to have memory as word per row, the Copy circuit will also be adjusted to work with that, for the precompile table we just need to change the byte into word, then the sub circuits need to do the decomposition themselves when necessary.

Connect to EVM circuit

In EVM circuit, when we encounter call to precompile address, we will do a copy table lookup, then inside Copy circuit it will copy input/output bytes to the precompile table with specified operation.

Rationale

For most precompiles they could be used with input with dynamic size (SHA256, RIPEMD160, MODEXP, ECPAIRING, BLAKE2F), it'd be easier to realize to have a single interface to connect EVM circuit with precompile table, and we could reuse the Copy circuit as the bridge to pass around these input/output.