IMX335LQN Image Sensor

Sensor specs

• Product Brief: IMX335-LQN (RGB) https://www.sony-semicon.com/files/62/flyer_security/IMX335LQN_Flyer.pdf
• Product Brief: IMX335-LLN (monochrome) https://www.phase1vision.com/userfiles/product_files/imx335lln_lqn_flyer.pdf
• Size: 2592 x 1944 Px (5.14 MP)
• Technology: Sony STARVIS (1st gen.)
• Pixel pitch: 2.0 x 2.0 µm
• Active area: 5.184 x 3.888 mm
• Diagonal: 6.52mm (Type 1/2.8)
• 2-lane, 4-lane CSI2
• 10 bit, 12 bit ADC modes
• supplies: 2.9V, 1.8V, 1.2V

One of the key pieces of information that led to the decision to use the IMX335 sensor was its spectral sensitivity:

(see DFM 36VX335-ML)

Additional information:

Device Photos

Top side (as-received in a tray…)

package underside, see-through orientation (matching top side picture)

Estimated geometric parameters

Pads (note the ball size is close to 0.4 mm BGA, but spaced out to a 0.65 mm pitch)

• pitch: 0.65mm
• size: 0.28mm
• columns: 10
• rows: 10

Package

• width: 7.217 mm
• length: 7.370 mm
• margin: 0.2 mm

Optical center

• X offset: +0.111 mm
• Y offset: +0.233 mm

Pinout

No-Connection Pads

Corner balls experience the highest strain, and thus can (assuming there are no layout-induced weak points, manufacturing defects) be used as a proxy for the overall solder joint integrity.

(source: https://asia.chemtronics.com/how-to-identify-and-solve-thermal-stress-issues-in-solder-joints)

HP Probook 6540B (LA-4892P) anecdote (credit WifiCable):

Sony CMOS sensors omit contact to the four corner balls (consistently within limited information that could be found openly). It can therefore be assumed that the four corner balls are either connected to VSS or left unconnected.

Interposer observations and reasoning:

• There seem to be no vias
• presumably only a single layer
• only edge contacts transitioning down a 45° facet to the sensor structure
• thin signal traces routed with lowest priority
• polygonal shape connections to supply balls with maximum fill factor

Therefore, it is safe to assume that all 16 balls with no visible connections are NC:

Ground

IMX335 uses 2.9V for analog circuitry. It can therefore be assumed, that such balls are paired with analog VSS connections, while all other balls can be treated as digital ground (perhaps with some attention to paricularities such as CSI and PLLs, allowing low-inductance routing to bypass capacitors when it comes to combinations of their supply rails and digital ground).

• Central polygon is under the active area and is presumed to have some degree of Faraday shielding function -> analog ground
• On a sacrificial IP camera board, continuity between central polygon and other balls is measured
• high fill factor polygons seem associated with power connections where they pair up with ground
• expect some bias voltages / capacitor bypass connections in addition to power
• minimum inductance between adjacent conductors

Supplies

• VDDH (2.9V) is for analog circuitry
• ascribe low loop inductance paired grounds to analog grounding (dark polygon overlays)
• note there are adjacent grounds where they could be connected (F3), and where they are obviously split (H5)

Next,

• VDDM (1.8V) I/O
• VDDL (1.2V) digital + PLLs (treated as digital supplies)
• adjacent but unconnected VDDL observable, respect intention with individual bypass capacitors, determine deeper intent later
• Three caps only connected to BGA balls

D10 seems to be rather curious, sometimes omitted, but certainly not routed with a great degree of concern - out of character for the rest of the supply-side routing and more similar to the simple slow speed logic.

G3, H3 are more like bypass caps and surrounded by supply nets.

VDDL in G, J, K rows are at least in part associated with the PLLs

CSI2, MCLK and I2C Essentials

• obtain an IMX335LQN board with known pinout
• non-destructive analysis preferred (keep board for later)
• 1.2V: ME6211C12M5G - S4UB / TPS79912DDCR / TPS79912DRVR / TPS79312DBVR
• 1.8V: ME6211C18M5G - S5WC / TPS79918DDCR / TPS79918DRVR / TPS79318DBVR
• 2.9V: ME6211C28M5G - S1WD / TPS79928DDCR / TPS79928DRVR (all 2.8V) / TPS793285DBVR (2.85V)
• Nominal current: 250 mA at 3.3V. ME6211 can provide up to 300 mA on a single rail, TPS793xx and TPS799xx rated 200 mA and likely not suitable for all IMX335 rails.

• all LDOs (MicrOne ME6211 available at LCSC) are hard-wired as enabled
• RPi Camera v2 schematic shows all LDO ENA connected together to IO0 (ENABLE 3V3), but camera /PWDN is connected to 1.8V. Thus, either the internal power-on reset is in effect, or a soft reset is issued later on. Hard reset is done via power cycling.

All logic signals are either 1.8V level (or 1.2V). No direct connections to 3.3V logic are allowed. I2C lines will require a level shifter.

• inspect PCB
• segregated diff pairs that are length- and delay-matched on the interposer are D0-D3 and CK and center is most likely CK due to its unique position
• CK likely surrounded by D0, D1 pairs to minimize skew in unfavorable routing conditions

Filling in:

• The remaining 9 balls are mostly not connected
• Sensors on breakout boards and IP cameras are usually run in master mode (XMASTER = 0)
• TEST is disabled (0)
• HSYNC (XHS), VSYNC (XVS) are not connected
• additional PU/PD for I2C / SPI mode could be present

At this point, the sensor could be brought up on a test PCB.

Questionable Information

On a Chinese forum, someone posted a screenshot of an IP camera schematic with potential issues. Mistakes in the component library cannot be ruled out, so the value of this additional information is up for debate.

• 16 NC pads
• 21 VSS pads
• H3, G3, D10 are indeed just bypass caps
• RSTN is called XCLR (XCLR does not sound like active-low enough)
• supply pad pairing seems mostly consistent with assumptions
• TENABLE, TEST1 are either NC or ground (bottom right)
• TOUT and ASMON should be NC despite location in schematic
• NC should not connect to anything and might be connected to GND
• best to route all questionable nets to test pads for validation

The Module I Should Have Bought

FRAMOS FSM-IMX335C: https://www.framos.com/de/produkte/fsm-imx335c-000-v1a-22357

If you just want to get something done, consider just buying these modules instead. They come with a fully specified pinout and break out XVS, HXS, XMASTER etc. (unlike the minimal sensor PCBs above).

• More diligent name brand module uses two larger ferrite beads, at least one of which is part of a pi filter across 2.9V, GND.
• Separate filtering for PLLs seems prudent but rather a trade-off in which more, smaller bypass capacitors make more sense than explicitly splitting the 1.8V and 1.2V supplies into mulitple groups.

Minimal Configuration

Another small sensor PCB with no LDOs was procured. This one is cut down to the bare minimum, with LDOs and large bypass caps offloaded to the parent PCB.

• No ferrite beads, only resistors. Values t.b.d.

• pin 17 (VDDIO) not connected
• pin 19 (PWDN) not connected
• nomenclature probably w.r.t. parent PCB, not sensor PCB
• RSTN probably handled via RC circuit
• Does not look like differential pairs are length matched to the connector. May rely on re-timer for best performance.

Summary

Much of the design rules for the target PCB can also be found in the design of the packaging itself, which is beautifully executed.

We can move forward with tentative conclusions and design a PCB around this sensor.