Work package 1 "Faster emulation of the RISC-V Sail model: Build Tooling, Documentation, CI Integration"

Using the Sail RISC-V model for emulation and testing currently has significant
downsides compared to other existing emulators for RISC-V, such as Spike or
QEMU. Specifically, the Sail-based emulators are 1000x-5000x slower, which
makes them unworkable for many applications. This is one of the main
pain-points of using the Sail model in RISC-V development.

Pydrofoil (PyPy's Sail backend) [1] significantly increases the speed of the
RISC-V Sail model. However, Pydrofoil is not currently easily usable by the
RISC-V community: it is not documented and hard to use by anyone except the
authors. In this work package we propose to provide build tooling,
documentation and testing for the RISC-V model using Pydrofoil. This is
interesting for RISC-V because it makes high-performance RISC-V Sail models
accessible to others, and will accelerate research in:

• better infrastructure for scripting and debugging RISC-V models
• dynamic binary translation/just-in-time compilation for faster Sail-based
  RISC-V emulation

Deliverables.

• Demonstrate at least 10x speed improvement booting the Linux from
  RISC-V Sail repo [2] over boot time with the existing Sail-generated C
  model.

• Build tooling and instructions for the RISC-V Sail model with Pydrofoil

• Testing and documenting running the RISC-V model on different operating
  system

• Setting up Continuous Integration (CI) on the repository to continuously
  run the RISC-V tests from [3] in the rv32si, rv32ui, rv64si, rv64ui
  variants

• Dissemination:

  • PyPy blogpost on [4] about fast RISC-V Sail emulation
  • YouTube video on [5] to explain how the fast RISC-V Sail emulation
    works

All the work will be fully Open Source and public.

[1] github.com/cfbolz/pydrofoil

[2] https://github.com/riscv/sail-riscv/tree/master/os-boot

[3] https://github.com/riscv-software-src/riscv-tests

[4] https://www.pypy.org/blog/

[5] https://www.youtube.com/playlist?list=PLADqad94yVqDRQXuqxKrPS5QnVqbDLlRt

Discussion 11.11

• Add PyPy, Sail, RISC-V-Sail as git submodules to github.com/cfbolz/pydrofoil

• Create a Makefile that will provide the chain to build Pydrofoil (matti) https://github.com/cfbolz/pydrofoil/issues/17

  • restructure the repo a little bit (carl)
  • Add it to the github repo
  • Pull a PyPy2 for building from downloads.python.org/pypy/
  • Build the 32/64 bit versions of Pydrofoil

• CI

  • make CI job build binaries using the Makefile
  • Upload the binaries as a release to github
  • find out how to execute the risc-v test binaries
    • how annoying is that?
    • choices: qemu or cross-compiling
  • if we have time: run the tests on the standard risc-v-sail-emulator

• Docs

  • setting up a readthedocs thing
    • describe building
    • describe testing
    • Use RST and sphinx
    • docs.pydrofoil.org

• Dissemination

  • blog post
  • video

• Competitors:

  • spike, qemu, Imperas riscvOVPsim