# NAND TO TETRIS NOTES > The aim of this course is to build a computer from scratch. > This course is divided in two parts, first part consists of hardware and second part consists of software. ![Project structure](http://blog.logancyang.com/images/cs4ds/abstractions.png) >[Downloads for the course](https://drive.google.com/file/d/1xZzcMIUETv3u3sdpM_oTJSTetpVee3KZ/view) ## Week 1: ### 1.1: Boolean Logic - Learned about different gate operations, their truth tables and minimization. ### 1.2: Boolean functions synthesis - Truth table to expression computation. - Every computation can be done using just NAND gates. ### 1.3: Logic Gates ### 1.4: HDL - Basics of HDL. - HDL code is a static representation of gate diagram. ### 1.5: Hardware Simulation - Brief description and demo of a software made by nand2tetris, for RTL simulation. - Own HDL language is used for simulation here. ### 1.6: Multi-bit Buses - Arrays in HDL. ### 1.7: Project 1 Overview - Implemented various elementary gates and multibit bus gates using NAND. ## Week 2: - Mathematics of boolean algebra - Made a Arithmetic logic unit on EDA playground - [ALU verilog code](https://www.edaplayground.com/x/SZPz) ## Week 3: ### 3.1: Sequential logic: - When inputs change we need to take in account the time, hence clocks are used in changing input system. - Combinational: Out[t]=input[t] - Sequential: Out[t]=input[t-1] ### 3.2: Flip-flops: - D flip-flop records the input of previous clock stage in current output state. - Basically, D flipflop remembers the previous stage.