contributed by < Eric Lin >
A half adder is a fundamental digital circuit that computes the sum S
and carry C
outputs based on two input bits.
The carry signal represents an overflow into the next digit of a multi-digit addition.
The formula for the sum and carry is as follows:
A | B | C | S |
---|---|---|---|
0 | 0 | 0 | 0 |
0 | 1 | 0 | 1 |
1 | 0 | 0 | 1 |
1 | 1 | 1 | 0 |
It is not designed to handle the complexities of multi-bit addition, lacking the ability to accommodate the expansion required for more significant binary numbers.
A full adder is designed to perform the addition of three binary digits: two inputs ( and ) and a carry input from the previous stage . It produces two outputs: a sum and a carry .
The sum is the result of adding the three inputs and is given by the XOR (exclusive OR) operation:
The carry :
A | B | Cin | S | Cout |
---|---|---|---|---|
0 | 0 | 0 | 0 | 0 |
0 | 0 | 1 | 1 | 0 |
0 | 1 | 0 | 1 | 0 |
0 | 1 | 1 | 0 | 1 |
1 | 0 | 0 | 1 | 0 |
1 | 0 | 1 | 0 | 1 |
1 | 1 | 0 | 0 | 1 |
1 | 1 | 1 | 1 | 1 |
Full adders can be connected in series to create a ripple-carry adder, allowing the addition of multi-bit binary numbers. The carry output from one full adder becomes the carry input for the next, enabling the propagation of carry through multiple stages.