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Designing a open Linux capable SoC using software - Charles Papon

tags: COSCUP2021 Skilled en COSCUP2021 Bringing Open Source Software to Hardware TR313

歡迎來到 https://hackmd.io/@coscup/2021 共筆 :mega:
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Slido: https://app.sli.do/event/o34fzzpz

用 iDSL (internal domain-specific language)建立硬體描述語言之上的抽象化

Scala code use SpinalHDL API

原本的 low-level API:






var r1 = Bool()
r1.setName("reg1")
r1.setAs(Reg())
var r2 = ...
r1.assign(r2)     ;; 大致意思，正確程式請見投影片

用高階 iDSL 協助建構程式、自動推論細節：



var r1, r2 = Reg(Bool())
r1 := r2

轉為 database -> VHDL/verilog -> Hardware

Host language as a elaboration tool
可以自由運用 host language 的特性(而非 iDSL)更加簡化程式，如 for、 map 等等，而不是把同樣的一行程式複製三遍：






var things = ArrayBuffer[Bool]()
for (idx <- 0 to 2) {
    things += Reg(Bool())
}
var logics = things.map(r=>!r)

Host language as a simulation tool
同樣使用 host language 的特性簡化模擬器與除錯器撰寫等

用這個概念來寫 CPU











class MyCpu(plugins: List[Plugin]) {
  val decode = new Stage
  val execute = new Stage
  //...
}

class Stage {
  val stuck = Bool()
  val discard = Bool()
}

SoC

Framework compose to SoC，實作 RV32IMAFDC, shared FPU

  • DDR3, SDcard, Ethernet, etc.
  • Negotiation between components: leverage software concepts such as await/async/future. You can define requirements and behaviors in advance before having all of the data.











val a, b = Handle[Int]
val calculator = Handle {
  a.get + b.get
}

val printer = Handle {
  print(calculate...)
}

a.load(3)
b.load(4)

Boot

  1. FPGA load bitstream
  2. first bootloader
  3. OpenSBI
  4. U-Boot
  5. Linux
  6. Buildroot
Select a repo