[TOC]

# Lab 1 : 16th Jan
username : root
password : ROOT100

Structure of mosfet
Gate control is only in 1 direction
MOS region
How to manufacture MOSFET

Mode of operation
1. Accumulation
2. Depletion
3. Inversion

For FINFET, gate control is in all 3 directions

## Asgn-1
Three ports of nMOS and pMOS
Band diagram for the same

Why do we apply gate voltage => To create channel
Drain voltage => To allow flow of electrons

### Short Channel Device
Channel length < 180nm
Effects like Channel length modulation, dibble and charge sharing (threshold voltage lowering) are observed.

### Long Channel Device
Channel length > 180nm

## Sentaurus TCAD
Technology Computer Aided Design

How to open sentaurus
:::info
**Navigating the folders**
home => desktop => tcad_lab => your_folder => open terminal

**In the terminal**;
csh
source cshrc_new
swb/sde (depending on mode you like to enter)
:::

Process to be followed
1. **SDE**
Structure Editor
Create device

3. **S Device**
Apply physics and to change properties
Apply model to accurately simulate
Ex : mobility of electrons depends on thickness of device and gate voltage

5. **S Visual**
View results of the simulation, in a PDF file format

# Lab 2 : 2nd Feb

Open sde (from terminal)
Create 2-D mosfet

Difference between mos-capacitor and mos-fet
Capacitor : between two plates


Germanium Device gets heated easily, hence not used widely.
Electron-hole mobility is greater in germanium.

## Doping and impurity

Intrinsic doping : pure semiconductor material
Extrinsic doping : some impurity is added

n-type impurity
<ol>
<li>Phosphorus</li>
<li>Arsenic</li>
</ol>

p-type impurity
<ol>
<li>Boron</li>
<li>Aluminium</li>
</ol>

| Region name | Material | x-dimension | y-dimension | remarks |
| -------- | -------- | -------- | -- | - |
| substrate | silicon | 0 to 0.09µm | 0 to 0.07µm | p-type silicon substrate |
| source | silicon | 0 to 0.030µm | 0 to 0.025µm | a |
| drain | a | 0.060 to 0.090 µm | 0 to 0.025µm | a |
| oxide-channel | silicon oxide | 0.03 to 0.06µm | 0.06 to -0.002µm | a |
| gate-contact | tin | 0.03 to 0.06µm | -0.002 to -0.004µm | a |
| source-contact | tin | 0 to 0.02µm | 0 to -0.002µm | a |
| drain-contact | tin | 0.07 to 0.09µm | 0 to -0.002µm | a |
|body-contact | tin | 0 to 0.09µm | 0.070 to 0.072µm | a |

To avoid short circuiting, other contacts should be of smaller dimension.

## Assignment
Differ bulk cmos technology and SOI cmos technology.

SOI : Silicon on Insulator
SOP : Silicon on Spire

# Lab 3 : missed (Duty Leave)

# Lab 4 : 16th Feb

Apply voltage on device and visualize results

Mobility
Temperature
Electric field
Scholkey recombination model

## Code
shared
mesh.tdr

cmd file
log file : stores run time, meshes created

1. Add input file into grid file
2. Add devices

Grid file : file jiski characteristic dekhni hai
common.parameter file : Notes which material is used and its properties
At 300K, Silicon BandGap 1.1eV

$$E_g = E_o - 3.6*10^-4 * T$$

Contour plot
Observed after the experiments

Systemic diagram
dash.plot file
IDVG (IV curve for Drain Current, GateVoltage)
log file will also be generated for each run, storing difference in results

## Electrode section
Metal Contacts,

### Physics section
apply physics to the complete device

Relation between mobility and electric field
$$ µ = V_d/E $$

At low gate voltage, Vertical Electric Field dominates
At high gate voltage, Horizontal Electric Field dominates

Model
1. DopingDependece
2. Philips Unified Mobility Model PhuMob

Plot section
self explanatory, to observe variables

How to find saturation
Gradient stops changing, check by approximating

Solve section
Apply voltage

## Creating parameter files for materials
1. Silicon
2. TiN
3. SiO2
:::info
csh
source schrc_new
sdevice -P:Silicon

rename model.par to Silicon.par
:::

Create a **common.par** file for the common parameters. Copy a already created file and paste it in the same directory; rename this file and remove all contents to generate a new file.
Rename this file to common.par
Insert the materials using

Material = "Silicon"{Insert = "Silicon.par"}
Material = "SiO2"{Insert = "SiO2.par"}
Material = "TiN"{Insert = "TiN.par"}

# Lab 5 : 23rd Feb

Refine Specification
RefEvalWin_1
select Define Ref/Eval window checkbox

| | x axis | y axis | value |
| ------ | ------ | ------ | ----- |
| first | 0 | 0 | |
| second | 0.03 | 0.025 | |

Under refinement definination section, change the name to source

| | x axis | y axis |
| -------- | -------- | -------- |
| max element | 0.005 | 0.005 |
| min element | 0.004 | 0.004 |

Click on build mesh, to get s-visual

# Lab 6 : 8th March
Write all formula's you know on a sheet of paper, lab ended in 40mins

# Lab 7 : 15th March Create pMOS

Right click, open terminal in roll-folder itself

Create pMOS, using the dimensions at [following table](https://hackmd.io/JSL3_FByQd-HjNaXQcgOGw#Doping-and-impurity)

After creating these, dope the areas by clicking on "Constant Profile Placement"
1. Source, Drain **Boron** 2e17
2. Substrate **Phosphorus** 1e16

## set contacts
All 4 neeed to be set
After adding all contacts to "contact set"

From dropdown, select the contact you want, right click on the diagram on the contact and under "Contacts" (in header toolbox) set contact
Click on activate.

## To create MESH
**define rel/eval window** => rectangle
x 0 to 0.09
y -0.004 to 0.072

:::info
Meshing was unsuccesful, no grid file was generated
Tried changing mesh size as well, increase and decreased mesh size to observe if the total computation load leads to a failure in creation of mesh.
:::

# Lab 8 : 22rd March Missed

# Lab 9 : 5th April Missed

# Lab 10 : 12th April
[drive link for all](https://drive.google.com/drive/folders/17cdqiLxS4k0jFxjf_TlWKEYC-ckyPU5F?usp=sharing)
Download as zip, extract and simply plot the first file

X axis
Y axis