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tags : 微算機與組合語言
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###### 國立臺北大學資工系江宥旻
Machine Language Coding and the DEBUG
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Converting assembly language instruction to machine code
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Machine code instructions of the 8088 vary in the number of bytes used to encode them
+ Single byte instruction
+ Double bytes instruction and above
+ General instruction format

graph TB
    id1[Assembly Language]-->Assembler;
    Assembler-->id2[Machine Code]


1. Byte1
+ Opcode field
+ 6 bits, specifies the operation
+ Register direction bit(D bit) `看REG放甚麼`
+ 0$\rightarrow$ 來源
+ 1 $\rightarrow$ 目的
+ Data size bit(W bit)
+ 0$\rightarrow$ 8 bits
+ 1 $\rightarrow$ 16 bits
2. Byte2
+ Mod field(MOD)
+ addressing mode
+ Register field(REG)
+ Register/Memory field(R/M)
+ 
+ 

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Example 1

**Register Addressing Mode**

MOV BL, AL

| REG | R/M |
|:---:|:---:|
| AL | BL |
| BL | AL |
> 因為REG和R/M都可以放暫存器，所以AL和BL可以互換位置，答案就會有所不一樣。

+ 6-bit opcode for the MOV is 100010
+ Encode AL in the REG field of byte 2, D = 0
+ `Encode AL in the R/M field of byte 2, D = 1`
+ Byte operation, W = 0
+ BYTE 1 = 10001000
+ `BYTE 1 = 10001010`
+ REG = AL = 000
+ `REG = BL = 011`
+ Second operand is also regiser, MOD = 11
+ Destination register is BL, R/M = 011
+ `Destination register is AL, R/M = 000`
+ BYTE 2 = 11000011
+ `BYTE 2 = 11011000`
+ MOV BL, AL is 88C3h
+ `MOV BL, AL is 8AD8h`

> 反白是AL和BL交換放的答案


Example 2

**Register Inderict Addressing Mode**

ADD AX, [SI]

$DS*16 + SI$

+ Add the 16-bit contents of the memory location indirectly specified by SI to the contents of AX
+ 6-bit opcode for the ADD is 000000
+ Encode AX in the REG field of byte 2, D = 1
+ Word operation, W = 1
+ BYTE 1 = 00000011
+ REG = AX = 000
+ Second operand is in memory, MOD = 00
+ Effective address, R/M = 100
+ BYTE 2 = 00000100
+ ADD AX, [SI] is 0304h


Example 3

**Direct Addressing Mode**

XOR CL, [1234H]

$DS*16 + 1234H$
> 因為CL只有1 byte，所以來源只能是1 byte

+ Exclusive-OR the byte of data at memory address 1234h with the byte contents of CL
+ 6-bit opcode for the XOR is 001100
+ Encode CL in the REG field of byte 2, D = 1
+ byte operation, W = 0
+ BYTE 1 = 00110010
+ REG = CL = 001
+ Second operand is in memory, MOD = 00
+ Effective address, R/M = 110
+ BYTE 2 = 00001110
+ BYTE 3 = 34H
+ BYTE 4 = 12H
+ XOR CL, [1234H] is 320E**3412**H **(Little Endian)**


Example 4

**Based-Indexed Addressing Mode**

ADD [BX][DI] + 1234H, AX

$DX*16 + BX + DI + 1234H$

+ Add the word contents of AX to the contents of the memory location specified by based-indexed address mode
+ 6-bit opcode for the ADD is 000000
+ AX is at source, Encode AX in the REG field of byte 2, D = 0
+ word operation, W = 1
+ BYTE 1 = 00000001
+ REG = AX = 000
+ Second operand is in memory, MOD = 10
+ Effective address, R/M = 001
+ BYTE 2 = 10000001
+ BYTE 3 = 34H
+ BYTE 4 = 12H
+ ADD [BX][DI]+1234H, AX is 0181**3412**H **(Little Endian)**


Example 5

**Based-Indexed Addressing Mode**

MOV WORD PTR [BP][DI] + 1234H, 0ABCDH
; WORD PTR指標(可寫可不寫)，指向[BP][DI] + 1234H位址
; 0ABCDH立即資料

+ Move the immediate data word ABCD16 into the memory location specified by based-indexed address mode
+ Byte 1 shown in Fig. 3.6 for the MOV is 1100011**W** (寬度，1$\rightarrow$ 2 Bytes)
+ word operation, W = 1
+ BYTE 1 = 11000111 = C7H
+ Byte 2 shown in Fig. 3.6 for MOV is $(MOD)000(R/M)$
+ Memory operation using 16-bit displacement, MOD = 10, R/M = 011
+ BYTE 2 = 10000011
+ BYTE 3 = 34H
+ BYTE 4 = 12H
+ BYTE5 and BYTE6 encode the immediate data = CDAB
+ MOV WORD PTR [BP][DI]+1234H, 0ABCDH is C7833412CDABH


> 詳細指令請看課本第79頁

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REP instruction
> repeat

+ REP = 1111001**Z** (Zero Flag)
+ Z is 1or 0 depending on whether the repeat operation is to be done when the zero flag is set or when it is reset


Encoding a complete program in machine cod
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參考資料
+ Barry B. Bery, “The Intel Microprocessors,” 8th Edition, 2009, Prentice Hall.
+ Walter A. Triebel, Avtar Singh, “The 8088 and 8086 Microprocessors – Programming, Interfacing, Software, Hardware, and Applications,” 4th Edition, 2003, Prentice Hall.
+ 國立臺北大學資工系張玉山教授ppt