# 數位系統設計 --- # 1-1 數字表示法 ### ==基礎概念== ${A_{j}}$ = A為Base of radix(基底),知道該系數值 , j為Power(乘幕),知道此數為X進位 2進位 = binary , 8進位 = octal , 10進位 = decimal , 16進位 = hexadeciamal ### ==Complements of Number (補數)== 例如decimal的補數 - 9's complement = $10^n$ -1 - N,n為數字位數,N為原數字 - 10's complement = $10^n$ -1 - N + 1,n為數字位數,N為原數字 例如binary的補數 - 1's complement = $2^n$ -1 - N,n為數字位數,N為原數字 - 2's complement = $2^n$ -1 - N +1,n為數字位數,N為原數字 ![](https://i.imgur.com/pmmEJZL.png) 也可以借用complement of number去進行計算 ![](https://i.imgur.com/e0G6LaS.png) ### BCD (binary coded decimal code) 跟16進位相近,但只使用0到9的code,10到15不使用 ![](https://i.imgur.com/1ESB7X2.png) 而在進行BCD的運算時,可以用+6(+0110)去方便判斷進位 ![](https://i.imgur.com/k4riV1T.png) # 2-1 一些邏輯判斷與迪摩根定理 ![](https://i.imgur.com/oiVt6Fg.png) # 2-2 SOP形式 / POS形式 SOP=Sum of Product POS=Product of Sum ![](https://i.imgur.com/AqGUzI2.png) # 2-3 索引極小值(mintern)與索引極大值(maxtern) ![](https://i.imgur.com/L79u6p7.png) ==$m_j$=$M_j^{-1}$== 一個boolean function可以解釋成mintern跟maxtern形式 ![](https://i.imgur.com/FVUvND1.png) # 3-1 K-map A Karnaugh map ( K map) ( 卡諾圖 ) is a diagram madeup of squares, with each square representing one **minterm** of the function. ![](https://i.imgur.com/BJpk5bF.png) ### ==K-map Example== simplify the third K-map ![](https://i.imgur.com/vN4jQLv.png) simplify the forth K-map ![](https://i.imgur.com/N1oIggX.png) simplify the forth K-map by invert function ![](https://i.imgur.com/KX2Yl7W.png) ### ==Don't care condition== 如果K-map當中的mintern結果為0或1皆可,那就紀錄一個X,計算時可以將其視為1或0,方便計算為主 ![](https://i.imgur.com/0um7QmU.png) # 3-2 NAND / NOR 記住迪摩根定律,轉換SOP或POS成NAND或是NOR形式時很常用到 ![](https://i.imgur.com/Nww8Eqf.png) ![](https://i.imgur.com/e0IqjfF.png) ### AOI / OAI AOI = and + NOR OAI = or + NAND ![](https://i.imgur.com/pJMwsma.png) (圖上方為AOI形式,下方為OAI形式) # 4-1 電路分析與設計 ![](https://i.imgur.com/sB0tDr9.png) ![](https://i.imgur.com/gUvZJ1h.png) # 4-2 Binary Adder ### Half Adder A combinational circuit that performs the addition of **two bits** is called a half adder ![](https://i.imgur.com/1qfwB56.png) ### Full Adder(一個二進位Adder電路設計) A combinational circuit that performs the addition of three bits (two significant bits and a previous carry ) is a full adder ![](https://i.imgur.com/vKvjSTa.png) ### Binary Adder ![](https://i.imgur.com/Tg5GOtc.png) ### Carry Lookahead Logic ![](https://i.imgur.com/VonnrOD.png) ![](https://i.imgur.com/JcK5uIK.png) **則可以用此重新表示Binary Adder** ![](https://i.imgur.com/sZVulVO.png) # 4-3 Binary Subtractor ![](https://i.imgur.com/iaeKe7p.png) ![](https://i.imgur.com/xbyflvW.png) # 4-4 Magnitude Comparator Magnitude Comparator = 比大小 ![](https://i.imgur.com/2PAWfFt.png) ![](https://i.imgur.com/OMigbvv.png) ![](https://i.imgur.com/coAYvX9.png) # 4-5 Decoder ![](https://i.imgur.com/K3SbCSB.png) ![](https://hackmd.io/_uploads/HkOSSlt42.png) ==**對於每一種可能的輸入組合,只有一個輸出為1**== ![](https://hackmd.io/_uploads/BkRqmet43.png) 4\*16轉成2個3\*8 (E維enable) ![](https://i.imgur.com/H1s1S9Q.png) # 4-6 Encoder ![](https://hackmd.io/_uploads/rJC_KgtEn.png) 是一個用來執行解碼器之反向操作的數位電路 ==**對於每一種只有一個為1的輸入組合,有一個輸出組合**== ![](https://hackmd.io/_uploads/S1TdG-KE2.png) 優先權編碼器的操作是假如有兩個以上的輸入同時等於1,使得具有最高優先權的輸入可以優先 # 4-7 Multiplexer ![](https://i.imgur.com/vCS8RoL.png) **fun fact,multiplexer 其實就是 encode + or gate** ![](https://i.imgur.com/3vaMj9l.png) 如果皆為0,就讓$I_0$這個資料通過 如果皆為1,就讓$I_3$這個資料通過 簡單來說,就是讓四台車子到中繼站,讓中繼站的section決定讓哪一台車子通過 # 4-8 Demultiplexer ![](https://hackmd.io/_uploads/Sy9YLzYNh.png) 簡單來說,就是讓一台車子進到中繼站,中繼站的section決定這台車樣往哪一條路走 # 4-9 Boolean Function Circuits ![](https://hackmd.io/_uploads/HkaSwMK43.png) # 4-10 Tri-state ![](https://hackmd.io/_uploads/SkFvPGtN3.png) C的定位有點像開關,高阻抗 = 電流過不去的說法 # 5-1 SR Latches Latches = 可以隨時輸入並更改其輸出值 ![](https://hackmd.io/_uploads/BykKhMGS2.png) ![](https://hackmd.io/_uploads/HJM02GzBh.png) 在此當中,可以加入En線(enable線),如果En為0那輸入無效化,如果En輸入為1那就進行正常的SR latches ![](https://hackmd.io/_uploads/Hk8X0fzB3.png) # 5-2 D Latches 將輸入的S,R值統一成一條線D,並且==D只能輸入10或01組合==,D和D'就如同SR輸入,但只有一條線 ![](https://hackmd.io/_uploads/S1tWTGGS3.png) ![](https://hackmd.io/_uploads/H1AlJQMBh.png) # 5-3 Flip_Flop Filp-Flop受到時脈(後簡稱為CLK)影響,只能在時脈當中修改其值 ![](https://hackmd.io/_uploads/SyTwszfS2.png) # 5-4 Positive / Negative edge時脈 ![](https://hackmd.io/_uploads/rJ7hMQGBn.png) ![](https://hackmd.io/_uploads/SyDeXmzBn.png) # 5-5 DFF 跟5-2的D Latches一樣,只是將En改成時脈CLK而已 D為直接輸入(0或1) 當CLK觸發的時候,D=0就reset(輸出為0),D=1就set(輸出為1) ![](https://hackmd.io/_uploads/HyODZQzS3.png) # 5-6 JKFF **DFF , D為JQ'+K'Q** ![](https://hackmd.io/_uploads/Hkm4XmMr3.png) ![](https://hackmd.io/_uploads/rygCmEQMBh.png) # 5-7 TFF JKFF當中的JK改成一條線表現, 使J=K ![](https://hackmd.io/_uploads/rJYhMVMH2.png) # 5-8 DFF with Asynchronous 在一般的DFF當中加入RESET線,RESET線的順位比所有人高,當RESET激發的時候輸入RESET的指令 ![](https://hackmd.io/_uploads/r1WymEMSh.png) # 5-9 時序電路 時序電路 = input + 現在FF狀態 + 時脈 ![](https://hackmd.io/_uploads/SJrVtrGB2.png) 第一階段 : 分析State Equations ![](https://hackmd.io/_uploads/SytUkLzH3.png) 第二階段 : 找到State Table ![](https://hackmd.io/_uploads/Byrzx8MBn.png) 第三階段 : 畫出State Diagram ![](https://hackmd.io/_uploads/Hy5qb8frh.png) # 5-10 分析電路 DFF => D=1時輸出1,D=0的時輸出0 ![](https://hackmd.io/_uploads/SJajXH9rh.png) JF => DFF的變體,D=JQ'+K'Q ![](https://hackmd.io/_uploads/H1JvDScBn.png) ![](https://hackmd.io/_uploads/r1_t_H9Sn.png)