# 積體電路設計實驗 Lab02

//rst_n 是什麼？
//in_valid ??
//in_p1 ??

//out_valid ??
//circle ??
// value ??

//clk ??
//rst_n ??

//竟然只需要考慮逆時針.....

module LOCK(
  clk,
  rst_n,
  //input
  in_valid,
  mode,	
  in,	
  in_p1,	
  //output
  out_valid,
  circle,
  value
);
//---------------------------------------------------------------------
//   PORT DECLARATION
//---------------------------------------------------------------------
input clk;
input rst_n;

input in_valid;
input[1:0] mode;
input[4:0] in;
input[4:0] in_p1;

output reg out_valid;
output reg[2:0]circle;
//output reg[6:0]value;
output reg[7:0]value;

//---------------------------------------------------------------------
//   PARAMETER DECLARATION
//---------------------------------------------------------------------
parameter s_waitin      = 4'd1;
parameter s_shift       = 4'd2;
parameter s_shift_2     = 4'd3;
parameter s_shift_3     = 4'd4;
parameter s_sort        = 4'd5;
parameter s_sum         = 4'd6;
parameter s_output      = 4'd7;


//---------------------------------------------------------------------
//   LOGIC DECLARATION
//---------------------------------------------------------------------

reg [4:0] locks[23:0];
reg [3:0] current_state, next_state; 
reg [4:0] cnt;  
reg [1:0] mode_r;
reg [4:0] in_p1_r;

reg weird;

//shift
reg [3:0] now_shift_1;
reg [3:0] now_shift_2;
reg [3:0] now_shift_3;

//sort
reg sort_idx;

reg [7:0] value_array [7:0];
reg [2:0] circle_array[2:0];
// for print array information in local environment
integer i, j, k, l;
initial begin
  $dumpfile("LOCK.vcd");
  $dumpvars(0, LOCK);
  for(i = 0; i < 24; i = i + 1)
    $dumpvars(1, locks[i]);
  for(i = 0; i < 8; i = i + 1) begin
    $dumpvars(1, value_array[i]);     
  end
  for(i = 0;i < 3;i = i + 1) begin
    $dumpvars(1, circle_array[i]);
  end
end

//---------------------------------------------------------------------
//   Design
//---------------------------------------------------------------------

// FSM
// current state
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    current_state <= s_waitin;
  else
    current_state <= next_state; 
end
// next state
always @(*) begin
  case(current_state)
    s_waitin:  if (cnt == 5'd24)
                 next_state = s_shift;
               else 
                 next_state = s_waitin;
    s_shift:   if(locks[0] == in_p1_r) begin
                 next_state = s_shift_2; 
               end
    s_shift_2: if(mode_r == 2'b00 && locks[0] == locks[8]) begin
                 next_state = s_shift_3;
               end
               else if(mode_r == 2'b01 && locks[0] == locks[8] && locks[4] == locks[12]) begin
                 next_state = s_shift_3;
               end
               else if(mode_r == 2'b10 && locks[0] == locks[8] && locks[4] == locks[12] && locks[2] == locks[10] && locks[6] == locks[14]) begin
                 next_state = s_shift_3;  
               end
    s_shift_3: if(mode_r == 2'b00 && locks[8] == locks[16]) begin
                 next_state = s_sum;
               end
               else if(mode_r == 2'b01 && locks[8] == locks[16] && locks[12] == locks[20]) begin
                 next_state = s_sum;
               end
               else if(mode_r == 2'b10 && locks[8] == locks[16] && locks[12] == locks[20] && locks[10] == locks[18] && locks[14] == locks[22]) begin
                 next_state = s_sum;
               end
    s_sum:     next_state = s_sort;
    s_sort:    if (cnt == 5'd8) 
                 next_state = s_output;
               else
                 next_state = s_sort;
    s_output:  if (cnt == 5'd7)
                 next_state = s_waitin;
               else
                 next_state = s_output;
    default: next_state = current_state;
  endcase
end

// update counter
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    cnt <= 2'b0;
  else
    case(current_state)
      s_waitin:   if (cnt == 5'd24) cnt <= 5'b0;         //總共25也是沒問題，可以看看Practice的例子
                  else if(in_valid) cnt <= cnt + 5'd1;
      s_sort:     if (cnt == 5'd8) cnt <= 5'd0;
                  else cnt <= cnt + 5'd1;
      s_output:   if (cnt == 5'd7) cnt <= 5'd0;
                  else cnt <= cnt + 5'd1;
      default: cnt <= cnt;
    endcase
end

//get mode
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    mode_r <= 2'b0;
  else
    case(current_state)
      s_waitin: if(in_valid && cnt == 0) mode_r <= mode;
      default: mode_r <= mode_r;
    endcase
end
//get in_p1
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    in_p1_r <= 2'b0; 
  else
    case(current_state)
      s_waitin: if(in_valid && cnt == 0) in_p1_r <= in_p1;
      default: in_p1_r <= in_p1_r;
    endcase
end

//initialize
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    for(i = 0;i < 8;i = i+1)
      value_array[i] <= 8'd0;
end

//test shift
always @(posedge clk or negedge rst_n) begin
  if(!rst_n) begin
    now_shift_1 <= 0;
    now_shift_2 <= 0;
    now_shift_3 <= 0;
  end
  else if (current_state == s_waitin) begin
    now_shift_1 <= 0;
    now_shift_2 <= 0;
    now_shift_3 <= 0;

    if(in_valid) 
      locks[cnt] <= in;

  end
  else begin
    if(current_state == s_shift) begin
      if (now_shift_1 == 8) begin
        now_shift_1 <= 0;
      end
      else begin
   
        if(!(locks[0] == in_p1_r)) begin

          for (i = 0;i < 7;i = i + 1) begin
            locks[i] <= locks[i+1];
          end
          locks[7] <= locks[0];

          now_shift_1 <= now_shift_1 + 1; 

        end
      end
    end
    else if(current_state == s_shift_2) begin
      if(!(mode_r == 2'b00 && locks[0] == locks[8])) begin
        if(!(mode_r == 2'b01 && locks[0] == locks[8] && locks[4] == locks[12])) begin
          if(!(mode_r == 2'b10 && locks[0] == locks[8] && locks[4] == locks[12] && locks[2] == locks[10] && locks[6] == locks[14])) begin
            for (i = 8;i < 15;i = i + 1) begin
              locks[i] <= locks[i+1];
            end
            locks[15] <= locks[8];
            now_shift_2 <= now_shift_2 + 1; 
          end
        end
      end
    end
    else if(current_state == s_shift_3) begin
      if(!(mode_r == 2'b00 && locks[8] == locks[16])) begin
        if(!(mode_r == 2'b01 && locks[8] == locks[16] && locks[12] == locks[20])) begin
          if(!(mode_r == 2'b10 && locks[8] == locks[16] && locks[12] == locks[20] && locks[10] == locks[18] && locks[14] == locks[22])) begin
            for (i = 16;i < 23;i = i + 1) begin
              locks[i] <= locks[i+1];
            end
            locks[23] <= locks[16];
            now_shift_3 <= now_shift_3 + 1;
          end
        end
      end
    end
  end
end

//record unlock situation
always @(posedge clk or negedge rst_n) begin
  if(!rst_n) begin
    for(i = 0;i < 3;i = i+1)
      circle_array[i] = 7'b111;
  end
  else if(current_state == s_waitin) begin
    for(i = 0;i < 3;i = i+1)
      circle_array[i] = 7'b111;
  end
  else if(current_state == s_sum) begin
    if(mode_r == 2'b00 && locks[8] == locks[16]) begin
      if(now_shift_1 <= circle_array[0]) begin

        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
      else if(now_shift_1 == circle_array[0] && now_shift_2 <= circle_array[1]) begin

        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
      else if(now_shift_1 == circle_array[0] && now_shift_2 == circle_array[1] && now_shift_3 <= circle_array[2]) begin

        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;


        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
    end
    else if(mode_r == 2'b01 && locks[8] == locks[16] && locks[12] == locks[20]) begin
      if(now_shift_1 <= circle_array[0]) begin

        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
      else if(now_shift_1 == circle_array[0] && now_shift_2 <= circle_array[1]) begin

        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
      else if(now_shift_1 == circle_array[0] && now_shift_2 == circle_array[1] && now_shift_3 <= circle_array[2]) begin
 
        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
    end
    else if(mode_r == 2'b10 && locks[8] == locks[16] && locks[12] == locks[20] && locks[10] == locks[18] && locks[14] == locks[22]) begin
      if(now_shift_1 <= circle_array[0]) begin

        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
      else if(now_shift_1 == circle_array[0] && now_shift_2 <= circle_array[1]) begin
        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
      else if(now_shift_1 == circle_array[0] && now_shift_2 == circle_array[1] && now_shift_3 <= circle_array[2]) begin

        circle_array[0] <= now_shift_1;
        circle_array[1] <= now_shift_2;
        circle_array[2] <= now_shift_3;

        value_array[0] <= locks[0] + locks[8] + locks[16];
        value_array[1] <= locks[1] + locks[9] + locks[17];
        value_array[2] <= locks[2] + locks[10] + locks[18];
        value_array[3] <= locks[3] + locks[11] + locks[19];
        value_array[4] <= locks[4] + locks[12] + locks[20];
        value_array[5] <= locks[5] + locks[13] + locks[21];
        value_array[6] <= locks[6] + locks[14] + locks[22];
        value_array[7] <= locks[7] + locks[15] + locks[23];

      end
    end
  end
  else if (current_state == s_sort) begin
    if(~sort_idx) begin
      for(i = 0;i < 8;i = i + 2) begin
        value_array[i]   <= (value_array[i] < value_array[i+1]) ? value_array[i+1] : value_array[i];
        value_array[i+1] <= (value_array[i] < value_array[i+1]) ? value_array[i]:value_array[i+1];
      end
    end
    else begin
      for(i = 1;i < 7;i = i + 2) begin
        value_array[i]   <= (value_array[i] < value_array[i+1]) ? value_array[i+1] : value_array[i];
        value_array[i+1] <= (value_array[i] < value_array[i+1]) ? value_array[i]:value_array[i+1];
      end
    end
  end
end

// sort
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    sort_idx <= 1'b0;
  else if(current_state == s_sort)
    sort_idx <= ~sort_idx;
end

//output
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    out_valid <= 1'b0;
  else
    case(current_state)
      s_output: out_valid <= 1'b1;
      default: out_valid <= 1'b0;
    endcase
end
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    circle <= 3'b0;
  else
    case(current_state)
      s_output: if (cnt < 5'd4) circle <= circle_array[cnt];
                else circle <= 3'b0;
      default: circle <= 3'b0;
    endcase
end
always @(posedge clk or negedge rst_n) begin
  if(!rst_n)
    value <= 8'b0;
  else
    case(current_state)
      s_output: value <= value_array[cnt];
      //s_output: value <= 8'b0;
      default: value <= 8'b0;
    endcase
end


endmodule

## 重點整理

1. 一個 always block 可以對多個 reg 賦值，但是一個 reg 只能在一個 always block 被賦值