---
# System prepended metadata

title: HW1

---

# HW1
# Q1
## Q1.1: Does the vector utilization increase, decrease or stay the same as VECTOR_WIDTH changes? Why?
![](https://i.imgur.com/CXc5e8T.png)
![](https://i.imgur.com/XIUz2zl.png)
![](https://i.imgur.com/Wk1OO8l.png)
![](https://i.imgur.com/ASbg0cW.png)


size VECTOR_WIDTH increase -> vector utilization decrease

This is because with more exponents in the register, the higher chance that the greater difference appears in between the expoments.
We hope that the exponents difference is less for that we don't want to waste computational resources.
For example a case with exponents(6, 5, 5, 6) means that we need to do multiplication 6 times, which is a good case we would like to see since it has good vector utilization. Another case with exponents (1, 2, 3, 10) means that we need to do the multiplication 10 times. But for the first 3 element, they actually do not need to do within 3 times.


# Q2
## Q2-1: Fix the code to make sure it uses aligned moves for the best performance.

**avx2 unavailable on server**


## Q2-2.1: What speedup does the vectorized code achieve over the unvectorized code?
- Unvectorized
    - experiment data (test1)
![](https://i.imgur.com/Bf3ge9m.png)
![](https://i.imgur.com/tLCjBxE.png)
![](https://i.imgur.com/pu3KRdF.png)
![](https://i.imgur.com/oJfX4Lf.png)
![](https://i.imgur.com/OEf1OuP.png)
    - median = 11.7995 sec
- Vectorized
    - experiment data (test1vim )
![](https://i.imgur.com/P9NWZYr.png)
![](https://i.imgur.com/H8qv71R.png)
![](https://i.imgur.com/9P8UOVZ.png)
![](https://i.imgur.com/5mQlImI.png)
![](https://i.imgur.com/d8CEDTc.png)
    - median = 3.39629 sec

- SpeedUp: 11.7995/3.39629 = 3.47423217688 x ~= 3

## Q2-2.2: What additional speedup does using -mavx2 give (AVX2=1 in the Makefile)? You may wish to run this experiment several times and take median elapsed times

**avx2 unavailable on server**

## Q2-2.3: What can you infer about the bit width of the default vector registers on the PP machines? What about the bit width of the AVX2 vector registers.

![](https://i.imgur.com/Y1Uf12X.png)
- Since the vectorization width is 4, we can derive the size of default vector resgisters by 4 * 32 (bit size of float) = 128 bit.

## Q2-3: Provide a theory for why the compiler is generating dramatically different assembly.
- before: not vectorized
![](https://i.imgur.com/oocmWKv.png)
- after: vectorized
![](https://i.imgur.com/TfVHN8i.png)



- code
![](https://i.imgur.com/zCaJh1V.png)
- original(- part)
    1. c <- a
    2. if (b>a) c <- b
    
    (1.) can be only exected before (2.) since there is a flow dependency that may cause unintentional result if computed parallelly. This is a WAW(Write-After-Write) hazard, which may make the compiler not able to rephrase the whole procedure. We can also directly recognized this issue from the compile message "unsafe dependent memory operations in loop". 
- modified (+ part)
    1. if(b>a) c <- b else c <- a

    Since it's a binary branch command and we only need to write into the same memory c, the compiler is able to rephrase this procedure into the following(we can find this in assembly code)
    1. max = max(a,b)
    2. c <- b 