---
# System prepended metadata

title: IC Design Online Study Group

---

# IC Design Online Study Group

## Participants - 13th Nov

- [X] Json
- [X] Travis
- [X] Thareeq
- [X] Lenoardo 
- [X] Flint 
- [X] Salman 


## Participants - 30th Oct 
 
- [X] Json 
- [X] Quark 
- [X] Salman 
- [x] Thraeeq
- [x] Akid
- [x] will
- [x] Paul
 
## Participants - 23rd Oct
- [x] Salman
- [x] Travis
- [x] Jason
- [x] Thareeq
- [x] Paul
- [x] Andhie
- [x] Qark
- [x] Qi Yang
- [x] Musawir

## Participants - 16th Oct
- [x] Paul
- [x] Travis
- [x] Jeremy
- [x] Denny
- [x] hinata
- [x] Akid
- [x] Salman

## Participants - 9th Oct
- [x] Paul
- [x] Jason
- [x] Ed
- [x] Raven
- [x] Qi Yang
- [x] Nickey
- [x] Hinata (Sunny)
- [x] Leonardo
- [x] Zain
- [x] Salman
- [x] Musawir

## Participants - 2nd Oct
- [x] Paul
- [x] Vincent
- [x] Qi Yang
- [x] Raven
- [x] Jason (Gray Hat)
- [x] Leonardo
- [x] Hinata
- [x] nickey
- [x] Ed (over the rainbow)
- [x] AKid
- [x] qark



## Discussion points (Suggestions)
- Basic language (Verilog,systemVerilog,vhdl)
- Book recommendation
    - SystemVerilogForDesign
    - Digital Electronics(Floyd)
    - Digital integrated circuits(Rabaey)
- Follow one open source design
- 1~2 week for basic language learning
- 1 session for industry knowledge
- build
- Leonardo
    - starting basics: 1 bit processor (learn RTL, logic gate...etc)
- Jason
    - using known IP blocks
    - as digital as possible
    - DREAM!! RF communicator with hellium / satellite （ADC）
- Qi Yang
    - agree with starting from project (68k motorola)
- Raven
    - replicate some existing and do some add-on
- Ed
    - Learning as a software developer to learn hardware language (1-2 weeks)
    - learn RISCV -> FPGA (3~4 weeks)
    - Tapeout (7-8 weeks), ultimate goal is to make a multi-core super CPU
    - Jason: We learn RISCV & Language at the same time

## Random topics
- Business connections (Realtek Ed)

## Learning materials

- 1BitProcessor Video : https://www.youtube.com/watch?v=y149hLe1zYo
- SystemVerilogForDesign: https://canvas.eee.uci.edu/courses/43849/files/17225106/download?verifier=0ENucAWkIn2fJLuyfZczPs8COljp6svizz7FVP8i&download_frd=1
- Digital Electronics(Floyd): https://bpcbirgunj.edu.np/wp-content/uploads/2019/10/DIGITAL_ELECTRONICS-by-Flyod.pdf
- Digital integrated circuits(Rabaey): https://www.academia.edu/31420183/Digital_integrated_circuits_a_design_perspective_by_jan_m_rabaey
- MC14500B (1bit processor) datasheet: https://pdf1.alldatasheet.es/datasheet-pdf/view/244447/MOTOROLA/MC14500B.html

## Follow up actions
- [x] Propose for the most simple ones (eg. 1 bit processor)
- [x] propose the exciting projects
    - [x] according to the project then we have detailed learning schedule
- [x] provide reference materials
- [x] schedule meeting once a week and share what we learnt


---
- Week 1: Overview of the environment setting
    - Software installing - Salman & Jason
        - Xilinx ISE
        - Vivado
        - Vitis
        - openlane, openroad, xls
    - Skills need to be covered
    - Initiate github repo
- Week 2: 0-ASIC,learn architecture and divide tasks (https://www.zerotoasiccourse.com/course_content/)
- Week 3: Design a LED blinks on WokWi
- Week 4: 
- Week 5: 
- Week 6: Run RISCV CPU on software simulation
- Week 7: 
- Week 8: UVM (Universal verification)
    - Ask Mohamed for slides
- Week 9: 
- Week 10:
- Week 11:
- Week 12:
- Week 13:
- Week 14:


Ultimate Goal:
- https://github.com/amichai-bd/riscv-multi-core-lotr