---
# System prepended metadata

title: RFIC

---

# Freqencies
![](https://hackmd.io/_uploads/HJDp5k7qn.png)

* wlan-n: 2.4GHz, 5GHz
* wlan-ad: 60GHz 10Gb/s 2.16GHz bandwidth
* wlan-ay: 60GHz 44Gb/s 2.16GHz bandwidth


# Transceiver

## Important Characteristic

### Transmitter
* High PA power
* High efficiency
* Thermal stable
* low leakage
* on during transmission


### Reciver

* high gain
* low noise
* high SNR
* all-time on
* low power consumption

### Channel Cap

$C$ = Channel Cap
$BW$ = Bandwidth
$N_o$ power spectral noise density
$P_r$ recived RW power

$$
C = BW * log_2 ( 1 + SNR)\\
SNR = \frac{P_r}{BW/N_o}
$$

#### Power increase:

* more $BW$ => efficient but impractical (noise, interference, standard)
* more $SNR$ => $P_r$ => more reciver gain, more transmitter power or less distance


### Reciver Topologies

#### Single Heterodyne 

Antenna -> RF BP Filter -> LNA -> IMG Reject -> Down MIX (VCO) -> Channel Select -> ADC -> DSP

$$
\omega_{IF} = \omega_{RF} - \omega_{LO}
$$

* Offset is constant
* Small IF => Noise now has large relative offset at image frequency => good channel select
* Other frequency might be mirrored into $\omega_{IF} = \omega_{RF} - \omega_{LO} = |\omega_{RF,i} - \omega_{LO}| = \omega_{LO} - \omega_{RF,i}$ 
    * filter before down mixing
    * distance is $2 \omega_{IF}$ => high $\omega_{IF}$/low $\omega_{lo}$  good for image select

#### Double Heterodyne

Antenna -> RF BP Filter -> LNA -> Down MIX 1 (VCO)->  IMG Reject -> Down MIX 2 (VCO) -> Channel Select -> ADC -> DSP

Down MIX 1 with high IF for good IMG reject
Down MIX 2 with low IF for good channel select

**More complex and expensive**

#### Hartley Architecture

* image rejection by using two myixers with opposit image polarity
* no high Q filter necessary
Turn sign of undesired product by exploiting details of mixer symetry


**precise matching otheweise useless (difficult)**


#### Direct Conversion

* no IMG filter, because directly mixing to DC
* simple low pass filter for channel filter
* low cost integrated realisation
* problem: DC offset caused by leakage can cause problems
* problem: (flicker) noise


# S-Parameters

## Mason Equation

$P_v$ = forward path $v$
$\Delta = 1 - \sum L$ L are loops
$\Delta_v$ $\Delta$ for network without path $v$

$$
\frac{\sum P_v\Delta_v}{\Delta}
$$

## Reflection Coeff vs S Parameter

S Parameters always for 50 Ohms.

If $Z_l = 50\Omega$ => $S_{11}=\Gamma_{11}$ (same for load)
$$$
\Gamma_{11} = S_{11}+\frac{S_{12}S_{21}\Gamma_L}{1-S_{22}\Gamma_L}
$$$


# RF Basics

## Stability

$$
K = \frac{1-|S_11|^2-|S_22|^2 + |det S|^2}{2|S_{12}S_{21}|}
$$

$K > 1$ $|detS|<1$ network unconditional stable
$K < 1$ conditional stable

* reduce gain to improve stability
* negative feedback to improve stability
* resistive or inductive (source/emitter) feedback used for LNAs
* gate drain feedback, increases noise, used for PA
* series resistor => decrease reflect/output power, strong noise degrade at input
* parallel resistor => decrease reflect/output power, strong noise degrade at input

## Gain

* Transducer gains $G_T = P_L/P_{AS}$
* Unilateralised Transducer gains $G_{TU} = G_T$ for $S_{12}=0$
* $MAG = \left|\frac{S_{21}}{S_{12}}\right|(K-\sqrt{K^2-1})$ (K > 1)
* $MSG = \left|\frac{S_{21}}{S_{12}}\right|$ (K < 1)

## Noise

* $N_f = 1 + \frac{N_A}{N_S}=\frac{SNR_1}{SNR_2}$ 
* $I_{th}^2 = 4kT\frac{\Delta f}{R}$
* $I_{sh}^2 = 2q I_{dc} \Delta f$
* $I_{fl}^2 = I_{flr}^2 * \frac{f_r}{f}$

Equation of Fris (noise of first stages most important)

$$
F_n = \sum \frac{F_n - 1}{G_1...G_{n-1}}
$$

### Nonlinear

* 1 dB compression: Output power decreased by 1 dB compared to linear (so gain reduced by 1dB from const)
* IP3: interesect between extrapolated (linear) of first order and thrid order

# Technology

$h_{21}=1$ => $f_T$

## CMOS sclaing

* (FD)SOI
* Multi Gate (fin FET)
* Multi Gate (fin FET)
* Strained Silicon (SiGe)
* Higher Barrier (K) dielectrics

# Passives

## Resistors


| Tech                  | Thin-Film           | Implanted     |
| --------              | --------            | --------      |
| sheet res             | low (metal)         | high          |
|                       | modetate (poly-sil) |               |
| voltage sensitivity   | low                 | moderate      |
| precison (abs/rel)    | high/high           | low/medium    |
| substrate couple      | low                 | high          |
| substrate couple      | low                 | high          |
| Application           | RF/precsion bias    | DC / blocking |



### Implanted

![](https://i.imgur.com/v6ddTnk.png)

### Thin-Film

![](https://i.imgur.com/QjpJvjm.png)


## Capacitor


| Tech                  | MiM                 | MOSFET                       |
| --------              | --------            | --------                     |
| cap per area          | modetate            | high                         |
| voltage sensitivity   | low                 | high (Varactor)              |
| precison (abs/rel)    | high/high           | low/medium                   |
| quality facotr        | high                | low in SI, moderate in III-V |
| substrate couple      | low                 | high                         |
| Application           | RF matching         | DC blocking                  |



### MIM

![](https://i.imgur.com/M5oRBek.png)

### MOSFET dopde Capaciotor

![](https://i.imgur.com/lVpqyC6.png)


## Inductor


![](https://i.imgur.com/OfLLFdz.png)
![](https://i.imgur.com/UMoO8GY.png)
![](https://i.imgur.com/JZOvBr0.png)

$$
Q(\omega) = \frac{1}{2\pi}\frac{E_{mag}-E_{elec}}{E_{loss}}
$$

Improvments
* substrate loss approx 1 in III-V
* SOI
* Paterened ground shield
* MEMS
* Low $\epsilon_r$
* Copper
* Hollow Spiral

## Off-Chip Interconnect 

### Bound wire

* thin metal wires
* used for transmission lines with SMA


### Solder Ball/FlipChip

* well suited for mass-fabricated
* high parasistic $C_s$


# Basic Amp

* miller effect: $C_{m} = (1-a_v)C_{gd}$ amplified at input => decrease speed, reduced by cascode

# LNA

* matching with dc block and shunt inductor
* feedback with $L_f$ to allow matching both noise and gain at once

# PA

$$
G = \frac{P_{L1}}{P_{in}}\\
\eta =\frac{P_{L1}}{P_{dc}}\\
PAE =\frac{P_{L1}-P_{in}}{P_{dc}} =\eta\left(1-\frac{1}{G}\right)
$$

* preffered topology: common source/emitter (high gain and efficiency)

### Switched amplifiers

* theoreticically 100% efficient
* in prtactice: switchings losses, fitler losses, harmonic loesses
* strong input power requrments => poor linearity not weel suited for amplitude modulation
* Class-D: complementary switches & filter
* Class-E: 1 switch, charge stroage & filter to get full wave
* Class-F: square output wave achieved with filter (low input power/bettter linearity & gain)

# Consultation Questsions

* Line inductor for implated resistor? (not shown in script but drawn in exercise)