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# System prepended metadata

title: Electronic Systems 1/2

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# Electronic Systems 1/2 
1. Laboratory for winter term '22
  * Maybe add an additional Task on ASK (incl. pulse shaping) using a coherent or non-coherent detector --> comparison with FSK
  * Maybe let the students build a coherent detector in Task 2, instead of  using again the QuadDemod block as in Task 1
  * Provide more guidelines for the evaluation of the limits in Task 4
      * Sending longer packet lengths avoids stuck of RX
      * Which metric (RSSI, BER, ...) should be used  for the evaluation
2. Laboratory improvements for summer term '22
  * ~~Include more details on ESP32 chip in the presentation slides~~
  * ~~Include more details on Python (e.g., description/examples for hexlify-command) in the presentation slides~~
  * ~~Add questions on the presentation slides for the entry test (check if the students have already gone through the lecture slides)~~
  * ~~Provide a protocol template~~
  * ~~Include the measurement of a of WLAN-signal (e.g., signal where **all**/**few**(e.g., only pilots) subcarriers are occupied)~~ --> DONE with GNU radio (not fully tested)
  *  If possible, include intermediate results in presentation slides (self-testing)
  *  **[SS23]:** Maybe add more hints on how to efficiently generate the packet in the first part (generate hex-strings (w/o "0x"), concatenate them, and transform them to bytearrays by packet.encode(), use binascii.unhexlify() for the tranmsission of the packet). Add encode()/decode() to slides on hexlify!
  * **[SS23]:** CRC in the second part is already implemented --> update slide! 
  * **[SS23]:** No CP required for STF --> update slide!
  * **[SS23]:** Swapping bytes mentioned slide 13 (*Frame Body: Fixed Parameters*) is a bit confusing --> actually the bytes do not need to be swapped
  * **[SS23]:** Generation of management frame should be done at home --> Prerequisite to attend the lab. Python code and result should be handed in advance. If we go this way, we can skip the entry test.
  * **[SS23]:** Maybe let the students do the subcarrier mapping in the function ofdm(). At least partly. Maybe remove the implementaiton of STF
  * **[SS23]:** Add some more information on the lab slides
      * Copy relevant information from lecture to lab slides (e.g., pilots, STF, ...)
      * More information about the Python snippet on slide 16 (ap.config())
      * Block diagram of complete OFDM chain (incl. srambler, convolutional coding, ...)
      * Relation between time-domain PHY-Paket and frequency-domain (subcarriers) 
      * More information on channels (how many channels does JKU, eduroam have, how many channels are available at which band, ...) **AND** access points
      

3. Lecture Content Electronic Systems 1 and 2
  * *Electronic Systems 1*
      * Lec. 1: Intro + Basics (incl. instantaneous phase/freq.)
      * Lec. 2: Oscillator and PLL (maybe also basic IQ-modulator structures, direct conversion transceiver)
      * Lec. 3: Antennas
      * Lec. 4/5: Digital modulation (ASK and FSK with plots from lab); basic block diagram of communication system (and line coding, see slide 35 Lec. 1)
      * Lec. 6: Synchronization (incl. relation to lab)
        **Improvement:** Maybe only focus  on carrier recovery schemes (as this is mentioned several times for (non)coherent receivers): Simple ad-hoc approaches and more sophisticated approaches (baseband and passband) --> discuss with **Reini**!
        Relation to CC1101: In the datasheet (p. 36) Frequency Offset Compensation, Bit Synchronization, and Byte Synchronization is described. Short explanations:
        * **Frequency Offset Compensation:** "When using 2-FSK, GFSK, 4-FSK, or MSK modulation, the demodulator will compensate for the offset between the  ransmitter and receiver frequency within certain limits, by estimating the centre of the received data. [...] Frequency offset compensation is not supported for ASK or OOK modulation."
        * **Bit Synchronization:** "The bit synchronization algorithm extracts the clock from the incoming symbols."
        * **Byte Synchronization:** "Byte synchronization is achieved by a continuous sync word search. [...] The demodulator uses this field to find the byte boundaries in the stream of bits. [...] The sync word detector correlates against the user-configured 16 or 32 bit sync word. The correlation threshold can be set to 15/16, 16/16, or 30/32 bits match."
  * *Electronic Systems 2*
      * Lec. 1: Adv. up/down conversion (SSB, ...)
      * Lec. 2: Nonidealities - General (Noise, IQ, nonlinearities, memory, ...)
      * Lec. 3: OFDM
      * Lec. 4: Nonidealities - OFDM
      * Lec. 5: Channel coding (block codes only through CRC example, convolutional code, interleaver, scrambler, ..)
      * Lec. 6: WLAN
          * Improvement 2022: Put source-code files into Moodle, not within slides (but keep as appendix)
   