# Weekly Report ###### tags: `weekly report` ### 2023/2/8 * Experiment handover ### 2023/2/1 * Revise the thesis * Experiment documents ### 2023/1/18 * TUZ ### 2023/1/11 * Journal * Thesis * Oral ppt ### 2022/12/28 * Journal * Thesis ### 2022/12/21 * Journal * Thesis ### 2022/12/14 * Journal ### 2022/12/7 * Journal ### 2022/11/30 * Journal ### 2022/11/23 * Journal ### 2022/11/17 * Journal ### 2022/11/9 * Journal ### 2022/10/26 * Journal * Simulating Wear-out Effects of Asymmetric Multicores at the Architecture Level ### 2022/10/19 * Journal ### 2022/10/12 * Journal ### 2022/10/5 * Journal ### 2022/9/27 * Journal * Oral ppt ### 2022/9/21 * Journal * Oral ppt ### 2022/5/16 * Control group ### 2022/5/2 * Run simulation ### 2022/4/25 * Simulator * NBTI-aware DVFS: A new approach to saving energy and increasing processor lifetime ### 2022/4/11 * multicore simulator * address an overlap of tasks ### 2022/3/28 * run gem5 and generate the task profile ### 2022/3/14 * experiment setup ### 2022/3/7 * An Aging-Aware Routing Algorithm for ImprovingReliability in NoC-Based Multicore Systems * generate benchmark ### 2022/2/21 * Multicore exeperiment ### 2022/2/14 * run benchmark under new Vth * generate profile including age, frequency, period, and power * LITTLE: 3 * big: 2 ### 2022/2/7 * run c432, c432d in different model card ### 2021/1/24 * [80%] VLSI final ### 2021/1/10 * [10%] VLSI final * run c432, c432d (different period) ### 2021/1/3 * [100%] VLSI HW4 * [1%] VLSI final * run c432, c432d ### 2021/12/27 * [70%] VLSI HW4 * run c432, c432d * An adaptive, utilization-based approach to schedule real-time tasks for ARM big.LITTLE architectures ### 2021/12/20 * [30%] VLSI HW4 * Dynamic Partitioned Scheduling of Real-Time DAG Tasks on ARM big.LITTLE Architectures* * Real-Time Task Scheduling * Task model ### 2021/12/5 * [100%] VLSI HW3 * An Empirical Approach to Minimize Latency of Real-Time Multiprocessor Linux Kernel * Task model ### 2021/11/29 * [60%] VLSI HW3 * problem formulation (task) * Aging-Constrained Performance Optimization for Multi Cores ### 2021/11/22 * [20%] VLSI HW3 * [100%] VLSI HW2 * problem formulation ### 2021/11/15 * [80%] VLSI HW2 * problem formulation ### 2021/11/8 * [30%] VLSI HW2 ### 2021/11/1 * [10%] VLSI HW2 * Experiments with Odroid-XU3 board ### 2021/10/25 * AXI * Yulin's work * tasks' performance on different v/fs ### 2021/10/18 * [100%] VLSI HW1 * Aging-Aware boosting * CHOAMP: Cost Based Hardware Optimization for Asymmetric Multicore Processors ### 2021/10/4 * [90%] VLSI HW1 * NBTI-Aware DVFS: A New Approach to Saving Energy and Increasing Processor Lifetime ### 2021/9/27 * [100%] VLSI HW3 * [10%] VLSI HW1 * Aging-Aware Boosting ### 2021/9/13 * [70%] VLSI HW3 * Power-Efficient Big.LITTLE Core Assignment Scheme for Task Graph Based Real-Time Smartphone Applications ### 2021/9/6 * [50%] VLSI HW3 * A Dynamic Voltage Scaling Algorithm for Sporadic Tasks ### 2021/8/30 * [10%] VLSI HW3 * Machine Learning for Power, Energy, and Thermal Management on Multicore Processors: A Survey ### 2021/8/23 * [1%] VLSI HW3 * Dynamic power management techniques in multicore architectures: A survey study ### 2021/8/16 * [100%] VLSI HW2 * NBTI-Aware DVFS: A New Approach to Saving Energy and Increasing Processor Lifetime Mehmet * Aging-aware Hardware-Software Task Partitioning for Reliable Reconfigurable Multiprocessor Systems ### 2021/8/2 * [90%] VLSI HW2 * paper review for task scheduling ### 2021/7/26 * [30%] VLSI HW2 * DynamIQ ### 2021/7/19 * [100%] VLSI HW1 * AdaMD: Adaptive Mapping and DVFS for Energy-Efficient Heterogeneous Multicores * DynamIQ ### 2021/7/11 * [50%] VLSI HW1 * [50%] AdaMD: Adaptive Mapping and DVFS for Energy-Efficient Heterogeneous Multicores ### 2021/7/5 * [100%] DIC HW5 * [40%] search paper about multicore dvfs ### 2021/6/28 * [100%] DIC exam * [60%] DIC hw5 * [100%] NASA exam * [100%] NASA lab16 * [30%] search paper about DynamIQ ### 2021/6/21 * [100%] AIC final project * [100%] NA/SA Lab11 * [10%] DIC HW5 * [10%] NA/SA Lab16 * A transparent and adaptive reconfigurable system Antonio ### 2021/6/7 * [100%] DIC HW4 * [100%] NA/SA Lab14 * [40%] AIC final project ### 2021/5/31 * [60%] DIC HW4 * [50%] NA/SA Lab14 * [100%] paper presentation ### 2021/5/24 * [100%] AIC midterm * [50%] NA/SA Lab12 * [100%] search paper ### 2021/5/10 * [80%] AIONCHIP midterm * [100%] DIC HW3 * [60%] Yulin's experiment * [60%] YongChe's experiment ### 2021/5/10 * [100%] NA/SA Lab7 * [100%] AIONCHIP HW1 * [50%] Yulin's experiment * [50%] YongChe's experiment * [80%] DIC midterm exam ### 2021/5/3 * [50%] NA/SA Lab7 * [50%] AIONCHIP HW1 * [50%] Yulin's experiment * [50%] YongChe's experiment ### 2021/4/26 * NA/SA Lab7 * AIONCHIP HW1 * Yulin's experiment * YongChe's experiment ### 2021/4/19 * NA/SA * Lab7 * exam * AIONCHIP * HW1 * exam * Novel Sel-Pipeling Approach for Speed-Power Efficient Reliable Binary Multiplication ### 2021/4/12 * DIC HW1 HW2 * NA/SA Lab6 * Run Yulin's code ### 2021/3/28 * NA/SA Lab5 * Aging-Aware Reliable Multiplier Design With Adaptive Hold Logic ### 2021/3/22 * ICC 2014 * Network Administration Lab4 ### 2021/3/15 * IC Contest 2016 2015 * Network Administration * A Novel Aging Sensor With Programmable Resolution ### 2021/3/8 * Performance-based and Aging-aware Resource Allocation for Concurrent GPU Application * CO HW3 * IC Contest 2017 ### 2021/2/22 * TSRI e-learning * [Aging-aware Logic Synthesis](https://ieeexplore.ieee.org/abstract/document/6691098) ### 2021/2/8 * TSRI course * CA HW4 * IC Contest 2020, 2018 * A Novel NBTI-Aware Chip Remaining Lifetime Prediction Framework Using Machine Learning ### 2021/1/25 * CA HW1, HW2 * e-learning ### 2021/1/20 * CA project * e-learning ### 2021/1/11 * Mobile Network, DS exam * CVDL project * CA project ### 2021/1/4 * CVDL HW * DS HW * DLIC project * Mobile Network exam ### 2020/12/28 * Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory * CA assignment * [code](https://hackmd.io/@vvang/aging) ### 2020/12/21 * CVDL HW * CA Quiz * [code](https://hackmd.io/@vvang/aging) ### 2020/12/14 * DT-CNN: Dilated and Transposed Convolution Neural Network Accelerator for Real-time Image Segmentation on Mobile Devices * [code](https://hackmd.io/@vvang/aging) * DLIC HW ### 2020/12/7 * [code](https://hackmd.io/@vvang/aging) * DLIC, CVDL ### 2020/11/30 * [code](https://hackmd.io/@vvang/aging) * DLIC, CA ### 2020/11/23 * CA, DLIC ### 2020/11/16 * DS, CA, CVDL * Mobile Network ### 2020/11/9 * CVDL, CA * Mobile Network ### 2020/11/2 * ML video * CVDL, DLIC HW ### 2020/10/26 * ML vedio * CA, CVDL ### 2020/10/19 * A CNN Accelerator on FPGA Using Depthwise Separable Convolution * Mobile Network, DLIC ### 2020/10/12 * A CNN Accelerator on FPGA Using Depthwise Separable Convolution * HW ### 2020/10/5 * Semi-supervised * computer architecture, data structure HW ### 2020/9/28 * pytorch, CNN * HW of courses ### 2020/9/21 * course * CNN ### 2020/9/14 * ML(Neural Network) * 昱霖's thesis ### 2020/9/7 * DIC, ML * DIC_HW4 ### 2020/8/24 * DIC, ML * Problem 6, 7 * DIC_HW4(ing) ### 2020/8/17 * DIC, EDA, ML * Problem 5, 9 * DIC_HW4(ing) ### 2020/8/10 * DIC, EDA, ML * Problem 8, 10 ### 2020/8/3 * DIC, OOP * DIC_HW3, ACM ICPC ### 2020/7/27 * DIC, OOP * DIC_HW2, ACM ICPC ### 2020/7/20 * watch DIC, OOP * DIC_HW1