# CH8. Differential and Multistage Amplifiers

:::info
**Disclaimer**
Cases involving BJTs are temporarily omitted, I might work on them someday if I have time. Also, if you spot any error, please contact me via my email: [e-mail]
:::

## 8.1 The MOS Differential Pair


:::success
++Recall++. common-mode input $V_{CM}$ and differential input $v_{id}$:
$v_{G1}=V_{CM}+\frac{v_{id}}{2}$
$v_{G2}=V_{CM}-\frac{v_{id}}{2}$
:::

### 8.1.1 Operation with a Common-Mode Input Voltage

($v_{G1}=v_{G2}=V_{CM}$, $Q_1$ and $Q_2$ are matched$\Rightarrow i_{D1}=i_{D2}=I/2$)

$V_S=V_{CM}-V_{GS}$
$i_D=\frac{I}{2}=\frac{k_n'}{2}\frac{W}{L}V_{OV}^2\Rightarrow V_{OV}=\sqrt{\frac{I}{k_n'(W/L)}}$
$V_{D1}=V_{D2}=V_{DD}-\frac{I}{2}R_D$
$V_O=V_{D2}-V_{D1}=0$

:::warning
++Def++. **(Input common-mode range)**: the range of $V_{CM}$ over which the DP operates properly:
$V_{CM\max}=V_D+V_t=V_t+V_{DD}-\frac{I}{2}R_D$ ($Q_1$ and $Q_2$ in sat. region)
$V_{CM\min}=-V_{SS}+V_{CS}+V_t+V_{OV}$ ($V_{CS}$: needed voltage across current source $I$ to operate properly)
:::

### 8.1.2 Operation with a Differential Input Voltage

($v_{G2}=0$, $v_{G1}=v_{id}\Rightarrow v_{id}=v_{GS1}-v_{GS2}$)

:::info
++Observation++. If $v_{id}>0$, then $i_{D1}>i_{D2}\Rightarrow v_{D1}<v_{D2}\Rightarrow v_O>0$
:::

**Find $v_{id}$ s.t. $I$ flows in only $Q_1\Rightarrow v_S=-V_t$**:
$I=\frac{1}{2}\left(k_n'\frac{W}{L}\right)(v_{GS1}-V_t)^2\Rightarrow v_{GS1}=V_t+\sqrt{\frac{2I}{k_n'(W/L)}}=V_t+\sqrt{2}V_{OV}$
($V_{OV}$: overdrive voltage corresponding to $i_D=I/2$)
$v_{id\max}=v_S+v_{GS1}=-V_t+V_t+\sqrt{2}V_{OV}=\sqrt{2}V_{OV}$

**The range of differential-mode operation**: $-\sqrt{2}V_{OV}\leq v_{id}\leq\sqrt{2}V_{OV}$

:::info
++Note++. To use DP as a linear amp., keep $v_{id}$ small.
:::

### 8.1.3 Large-Signal Operation

($\lambda = 0$, $v_{id}\equiv v_{G1}-v_{G2}$)

$\sqrt{i_{D1,2}}=\sqrt{\frac{k_n'}{2}\frac{W}{L}}(v_{GS1,2}-V_t)\Rightarrow\sqrt{i_{D1}}- \sqrt{i_{D2}}=\sqrt{\frac{k_n'}{2}\frac{W}{L}}v_{id}$
$i_{D1}+i_{D2}=I$
$\Rightarrow 2\sqrt{i_{D1}i_{D2}}=I-\frac{k_n'}{2}\frac{W}{L}v_{id}^2$
$\Rightarrow i_{D1}=\frac{I}{2}\pm \sqrt{k_n'\frac{W}{L}I}\left(\frac{v_{id}}{2}\right)\sqrt{1-\frac{(v_{id}/2)^2}{(I/(k_n'(W/L)))}}$ (take "+" sign)
$\Rightarrow i_{D2}=\frac{I}{2}\pm \sqrt{k_n'\frac{W}{L}I}\left(\frac{v_{id}}{2}\right)\sqrt{1-\frac{(v_{id}/2)^2}{(I/(k_n'(W/L)))}}$ (take "-" sign)
Substitution using $V_{OV}=\sqrt{\frac{I}{k_n'(W/L)}}$, we get
$i_{D1}=\frac{I}{2}+\left(\frac{I}{V_{OV}}\right)\left(\frac{v_{id}}{2}\right)\sqrt{1-\left(\frac{v_{id}/2}{V_{OV}}\right)^2}$
$i_{D2}=\frac{I}{2}-\left(\frac{I}{V_{OV}}\right)\left(\frac{v_{id}}{2}\right)\sqrt{1-\left(\frac{v_{id}/2}{V_{OV}}\right)^2}$
If **$v_{id}\ll 2V_{OV}$**:
$i_{D1}\simeq\frac{I}{2}+\left(\frac{I}{V_{OV}}\right)\left(\frac{v_{id}}{2}\right)$
$i_{D2}\simeq\frac{I}{2}-\left(\frac{I}{V_{OV}}\right)\left(\frac{v_{id}}{2}\right)$
$\Rightarrow$ current increment $i_d=\left(\frac{I}{V_{OV}}\right)\left(\frac{v_{id}}{2}\right)$

:::success
++Recall++. $g_m=\frac{2I_D}{V_{OV}}$ for MOS. In DP case, $I_D=I/2$, and transconductance can be expressed as $\Delta i_d/v_{id}$
:::


### 8.1.4 Small-Signal Operation

#### Differential Gain

($v_{G1}=V_{CM}+\frac{v_{id}}{2}$, $v_{G2}=V_{CM}-\frac{v_{id}}{2}$)

:::warning
++Def++. **(Single-ended output)**: $v_{o1}$, $v_{o2}$. **(Differential output)**: $v_{od}=v_{o2}-v_{o1}$
:::

**T-model**

(virtual ground $\Uparrow$ by the symmetric)
($g_m=\frac{2I_D}{V_{OV}}=\frac{I}{V_{OV}}$)

$v_{o1}=-g_m\frac{v_{id}}{2}R_D$, $v_{o2}=+g_m\frac{v_{id}}{2}R_D$

**Gain for single-end**: $\frac{v_{o1}}{v_{id}}=-\frac{1}{2}g_mR_D$, $\frac{v_{o2}}{v_{id}}=\frac{1}{2}g_mR_D$
**Differential gain**: $A_d\equiv\frac{v_{od}}{v_{id}}=\frac{v_{o2}-v_{o1}}{v_{id}}=g_mR_D$

:::info
++Note++. Alternative view
:::

#### The Differential Half-Circuit

($Q_1$ is biased at $I/2$ and operating at $V_{OV}$)

$\Rightarrow A_d=g_m(R_D\|r_o)$

### 8.1.5 The Differential Amplifier with Current-Source Loads


$A_d=g_{m1}(r_{o1}\|r_{o3})$

### 8.1.6 Cascode Differential Amplifier


:::success
++Recall++. For CG Amp, $R_o=r_o+R_S+g_mr_oR_S$, $R_{in}=\frac{r_o+R_L}{1+g_mr_o}$
:::
$A_d=g_{m1}(R_{on}\|R_{op})=g_{m1}(R_{on}\|R_{op})$
where
$R_{op}=g_{m5}r_{o5}r_{o7}$, $R_{on}=g_{m3}r_{o3}r_{o1}$

## 8.3 Common-Mode Rejection

### 8.3.1 The MOS Case

(Current source isn't ideal and have output resistance $R_{SS}$)
(common-mode input signal: $v_{icm}$)
:::info
++Note++. $R_{SS}$ has **no effect** on $A_d$ (Think about virtual ground!).
:::

**T-model and the common-mode half-circuit**

$v_{icm}=i(\frac{1}{g_m}+2R_{SS})\Rightarrow i=\frac{v_{icm}}{1/g_m+2R_{SS}}$
$v_{o1}=v_{o2}=-R_Di=-\frac{R_D}{1/g_m+2R_{SS}}v_{icm}\Rightarrow \frac{v_{o1}}{v_{icm}}=\frac{v_{o1}}{v_{icm}}\simeq-\frac{R_D}{2R_{SS}}$
$v_{od}=v_{o2}-v_{o1}=0\Rightarrow$ **No common-mode gain if the circuit is matched**

#### Effect of $R_D$ mismatch

If the load of $Q_1$ is $R_D$, $Q_2$ is $R_D+\Delta R_D$, then

$v_{o1}\simeq-\frac{R_D}{2R_{SS}}v_{icm}$, $v_{o2}\simeq-\frac{R_D+\Delta R_D}{2R_{SS}}v_{icm}$
$v_{od}=v_{o2}-v_{o1}=-\frac{\Delta R_D}{2R_{SS}}v_{icm}\Rightarrow A_{cm}\equiv\frac{v_{od}}{v_{icm}}=-\frac{\Delta R_D}{2R_{SS}}$
(Or, $A_{cm}=-\left(\frac{R_D}{2R_{SS}}\right)\left(\frac{\Delta R_D}{R_D}\right)$)
$\text{CMRR}\equiv\frac{|A_d|}{|A_{cm}|}=\frac{g_mR_D}{\Delta R_D/2R_{SS}}=\frac{2g_mR_{SS}}{\Delta R_D/R_D}$

#### Effect of $g_m$ mismatch in CMRR

$A_{cm}\simeq\left(\frac{R_D}{2R_{SS}}\right)\left(\frac{\Delta g_m}{g_m}\right)\Rightarrow\text{CMRR}=\frac{2g_mR_{SS}}{\Delta g_m/g_m}$

#### Differential versus Singel-Ended Output

$A_{cm}=-\frac{R_D}{2R_{SS}}$, $A_{d}=-\frac{1}{2}g_mR_D$
$\text{CMRR}=g_mR_{SS}$ (reduced$\Rightarrow$bad)

## 8.4 DC Offset

### 8.4.1 Input Offset Voltage of the MOS Differential Amplifier


:::warning
++Def++. **(Output DC offest voltage)**: the output voltage where $V_{G1}$ and $V_{G2}$ are grounded ($\neq 0 \because$ mismatch).
++Def++. **(Input DC offest voltage, $V_{OS}$)**: the magnitude of voltage when applied between two inputs, the dc offest voltage would be $0$.
:::

#### $V_{OS}$ Due to $R_D$ Mismatch

:::success
++Recall++. $I_D=\frac{k_n}{2}V_{OV}^2 \Rightarrow \Delta I_D=k_nV_{OV} \Delta V_{OV}=g_m\Delta V_{OV}$ (pretty obvious if you think about SS model)
:::

Consider $R_{D1}=R_D+\frac{\Delta R_D}{2}$, $R_{D2}=R_D-\frac{\Delta R_D}{2}$.
Apply $V_{OS}\Rightarrow I_{D1}=\frac{I}{2}-g_m\frac{V_{OS}}{2}$, $I_{D2}=\frac{I}{2}+g_m\frac{V_{OS}}{2}$
To make $V_O=0\Rightarrow (\frac{I}{2}-g_m\frac{V_{OS}}{2})(R_D+\frac{\Delta R_D}{2})=(\frac{I}{2}+g_m\frac{V_{OS}}{2})(R_D-\frac{\Delta R_D}{2})$
$\Rightarrow V_{OS}=\left(\frac{V_{OV}}{2}\right)\left(\frac{\Delta R_D}{R_D}\right)$

#### $V_{OS}$ Due to $k_n$ Mismatch

Consider $k_{n1}=k_n+\frac{1}{2}\Delta k_n$, $k_{n2}=k_n-\frac{1}{2}\Delta k_n$.
When inputs are grounded, $I_{D1}=\frac{I}{2}\left(1+\frac{1}{2}\frac{\Delta k_n}{k_n}\right)$, $I_{D2}=\frac{I}{2}\left(1-\frac{1}{2}\frac{\Delta k_n}{k_n}\right)$
Apply $V_{OS}$ to vanish "$\frac{1}{2}\frac{\Delta k_n}{k_n}$" $\Rightarrow g_m\frac{V_{OS}}{2}=\frac{I}{2}\times\frac{1}{2}\frac{\Delta k_n}{k_n}$
$\Rightarrow V_{OS}=\left(\frac{I/2}{g_m}\right)\left(\frac{\Delta k_n}{k_n}\right)=\left(\frac{V_{OV}}{2}\right)\left(\frac{\Delta k_n}{k_n}\right)$

#### $V_{OS}$ Due to $V_t$ Mismatch

Consider $V_{t1}=V_t+\frac{\Delta V_t}{2}$, $V_{t2}=V_t-\frac{\Delta V_t}{2}$.
$\Rightarrow I_{D1}=\frac{k_n}{2}\left(V_{OV}-\frac{\Delta V_t}{2}\right)^2\simeq \frac{k_n}{2}\left(V_{OV}^2-V_{OV}\Delta V_t\right)=\frac{I}{2}\left(1-\frac{\Delta V_t}{V_{OV}}\right)$
Apply $V_{OS}$ to vanish "$\frac{\Delta V_t}{V_{OV}}$" $\Rightarrow g_m\frac{V_{OS}}{2}=\frac{I}{2}\times\frac{\Delta V_t}{V_{OV}}$
$\Rightarrow V_{OS}=\Delta V_t$ (makes sense)

:::info
++Note++. Combine these factors we get
$V_{OS}=\sqrt{\left(\frac{V_{OV}}{2}\frac{\Delta R_D}{R_D}\right)^2+\left(\frac{V_{OV}}{2}\frac{\Delta k_n}{k_n}\right)^2+\left(\Delta V_t\right)^2}$
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## 8.5 The Differential Amplifier with a Current-Mirror Load

### 8.5.1 Differential-to-Signal-Ended Conversion

:::info
++Note++. drawback: lose a factor of 2 in gain.
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### 8.5.2 The Current-Mirror-Loaded MOS Differential Pair


**CM and differential SS analysis**
:::info
++Note++. Additional $i$ due to the current mirror compensate the lost of the gain.
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### 8.5.3 Differential Gain of the Current-Mirror-Loaded MOS Pair

(Now we take $r_o$ into consideration)

:::danger
++Caution++. The circuit is **NOT** symmetric, thus differential half-circuit can not be directly used.
:::

**Converting to a simpler circuit**
($G_{md}$: the short-circuit transconductance for differential input)

#### Derivation of the Differential Short-Circuit Transconductance, $G_{md}$


($G_{md}\equiv\frac{i_o}{v_{id}}$)

:::info
++Observation++. When shorting the output, The circuit is nearly balanced as the resistance of $Q_4$ is ignored due to short-circuit, and $Q_3$ has small resistance. Therefore, the voltage at the source of $Q_{1,2}$ is nearly $0 \Rightarrow$ **virtual ground**.
:::

$i_o=g_{m2}(\frac{v_{id}}{2})-g_{m4}v_{gs4}$
$v_{gs4}=v_{gs3}=-g_{m1}(\frac{v_{id}}{2})(\frac{1}{g_{m3}}\|r_{o3}\|r_{o1})\simeq -\frac{g_{m1}}{g_{m3}}(\frac{v_{id}}{2})$ if $\frac{1}{g_{m3}}\ll r_{o3}, r_{o1}$
Given that $g_{m3}=g_{m4}$, $g_{m1}=g_{m2}=g_m$, we have
$\Rightarrow i_o=g_{m2}(\frac{v_{id}}{2})+g_{m4}\frac{g_{m1}}{g_{m3}}(\frac{v_{id}}{2})=g_mv_{id}$
$\Rightarrow G_{md}=g_m$

#### Derivation of the Output Resistance $R_o$

($R_o\equiv\frac{v_x}{i_x}$)
:::success
++Recall++. For CG Amp, $R_o=r_o+R_S+g_mr_oR_S$, $R_{in}=\frac{r_o+R_L}{1+g_mr_o}$
:::
Load resistance for $Q_1$ (i.e, $Q_3$'s input resistance): $\frac{1}{g_{m3}}\|r_{o3}\simeq\frac{1}{g_{m3}}$
$\Rightarrow R_{in1}\simeq\frac{1}{g_{m1}}+\frac{1/g_{m3}}{g_{m1}r_{o1}}\simeq\frac{1}{g_{m1}}$
$\Rightarrow R_{o2} \simeq r_{o2}+\frac{1}{g_{m1}}+g_{m2}r_{o2}R_{in1}\simeq 2r_{o2}$ (for $g_{m1}=g_{m2}=g_m$)
$\Rightarrow i_x=2i+\frac{v_x}{r_{o4}}=v_x(r_{o2}\|r_{o4})$
$\Rightarrow R_o=r_{o2}\|r_{o4}$

:::info
++Summary++. If $R_{od}$ is the output resistance of the differential pair and $R_{om}$ is the output resistance of the current-mirror, we get

$G_{md}=g_{m1,2}$
$R_o=R_{od}\|R_{om}=r_{o2}\|r_{o4}$
$A_d\equiv\frac{v_{o}}{v_{id}}=G_{md}(R_{od}\|R_{om})=g_{m1,2}(r_{o2}\|r_{o4})$
For the case where $r_{o2}=r_{o4}=r_o$, $A_d=\frac{1}{2}g_mr_o=\frac{1}{2}A_0$
:::

### 8.5.5 Common-Mode Gain and CMRR


#### Derivation of the Common-Mode Transconductance $G_{mcm}$

($R_{im}=\frac{1}{g_{m3}}\|r_{o3}\simeq\frac{1}{g_{m3}}$, $R_{om}=r_{o4}$, $A_m=\frac{1}{1+\frac{1}{g_{m3}r_{o3}}}$)

$i_1=g_{m1}(v_{icm}-v_s)+\frac{-i_1R_{im}-v_s}{r_{o1}}$
$i_2=g_{m2}(v_{icm}-v_s)-\frac{v_s}{r_{o2}}$
$v_s=R_{SS}(i_1+i_2)$
Define $D=1+\frac{1}{g_mr_o}+\left(\frac{R_{im}}{2r_o}\right)\left(1+\frac{1}{g_mr_o}+\frac{1}{g_mR_{SS}}\right)\simeq1+\epsilon+\frac{R_{im}}{2r_o}$
We have
$i_1=\left(\frac{v_{icm}}{2R_{SS}}\right)\left(\frac{1}{D}\right)\simeq\left(\frac{v_{icm}}{2R_{SS}}\right)\left(1-\epsilon-\frac{R_{im}}{2r_o}\right)$
$i_2=\left(\frac{v_{icm}}{2R_{SS}}\right)\left(\frac{1+\frac{R_{im}}{r_o}}{D}\right)\simeq\left(\frac{v_{icm}}{2R_{SS}}\right)\left(1-\epsilon+\frac{R_{im}}{2r_o}\right)$
$\Rightarrow i_o=i_2+A_mi_1=\left(\frac{v_{icm}}{2R_{SS}}\right)\left[(A_m-1)(1-\epsilon)-\frac{R_{im}}{2r_o}(A_m+1)\right]$
$\Rightarrow G_{mcm}\equiv\frac{i_o}{v_{icm}}=\left(\frac{1}{2R_{SS}}\right)\left[(A_m-1)(1-\epsilon)-\frac{R_{im}}{2r_o}(A_m+1)\right]\simeq -\frac{1}{2R_{SS}}\frac{1}{g_{m3}(r_o\|r_{o3})}$

#### Common-Mode Gain

$A_{cm}=G_{mcm}R_o=-\frac{1}{2R_{SS}}\frac{r_{o2}\|r_{o4}}{g_{m3}(r_o\|r_{o3})}=-\frac{1}{2g_{m3}R_{SS}}$

#### The Common-Mode Rejection Ratio

$\text{CMRR}=(2g_{m1,2}R_{SS})[g_{m3}(r_o\|r_{o3})]=(2g_{m1,2}R_{SS})[g_{m3}(R_{od}\|R_{om})]$

## 8.6 Multistage Amplifiers

### 8.6.1 A Two-Stage CMOS Op Amp

(Functions of $C_C$ will be discussed in Chapter 12)

#### Voltage Gain

$A_1=-g_{m1}(r_{o2}\|r_{o4})$, $A_2=-g_{m6}(r_{o6}\|r_{o7})$
$\Rightarrow A_d=A_1A_2=g_{m1}g_{m6}(r_{o2}\|r_{o4})(r_{o6}\|r_{o7})$

#### Input Offset Voltage

:::info
++Note++. **Random offset** stems from device mismatch and is inevitable, while **systematic offset** can be minimized by careful design.
:::

To prevent systematic offset in the above circuit:
$I_6=\frac{(W/L)_6}{(W/L)_4}(I/2)$, $I_7=\frac{(W/L)_7}{(W/L)_5}I$ (If inputs are grounded)
$\Rightarrow \frac{(W/L)_6}{(W/L)_4}=2\frac{(W/L)_7}{(W/L)_5}$

## Summary

- $g_m=\frac{I}{V_{OV}}$ and $r_o=\frac{V_A}{I/2}$ for each MOS in the differential pair.
- The range of differential-mode operation: $-\sqrt{2}V_{OV}\leq v_{id}\leq\sqrt{2}V_{OV}$
- If small diffential input is applied ($v_{I1,2}=V_{CM}\pm v_{id}/2$), the current changes in $Q_{1,2}$ are $\pm g_mv_{id}/2$, the output voltage signal is thus $\pm g_m(R_D\|r_o)v_{id}/2$, and the differential gain $A_d=g_m(R_D\|r_o)$.
- If a small common-mode input is applied ($v_{icm}$)
- When the circuit is matched, voltage signals at both drain are $-v_{icm}\frac{R_D}{2R_{SS}}$. If the output is taken single-endedly, $|A_{cm}|=\frac{R_D}{2R_{SS}}$, and if the output is taken differentially, $|A_{cm}|=0$.
- When the circuit is mismatched:
- $\Delta R_D$ causes $|A_{cm}|=\left(\frac{R_D}{2R_{SS}}\right)\left(\frac{\Delta R_D}{R_D}\right)$.
- $\Delta k_n$ causes $|A_{cm}|=\left(\frac{R_D}{2R_{SS}}\right)\left(\frac{\Delta k_n}{k_n}\right)$.
- Input DC offset voltage due to mismatch: $V_{OS}=\sqrt{\left(\frac{V_{OV}}{2}\frac{\Delta R_D}{R_D}\right)^2+\left(\frac{V_{OV}}{2}\frac{\Delta k_n}{k_n}\right)^2+\left(\Delta V_t\right)^2}$ (If independent)
- For current-mirror-loaded differential pairs:
- $G_{md}=g_{m1,2}$.
- $R_o=R_{od}\|R_{om}=r_{o2}\|r_{o4}$.
- $A_d=g_{m1,2}(r_{o2}\|r_{o4})$
- $G_{mcm}\simeq -\frac{1}{2R_{SS}}\frac{1}{g_{m3}(r_o\|r_{o3})}$
- $A_{cm}=-\frac{1}{2g_{m3}R_{SS}}$
- For the CMOS two-stage amplifier:
- $A_1=-g_{m1}(r_{o2}\|r_{o4})$
- $A_2=-g_{m6}(r_{o6}\|r_{o7})$
- $A_d=A_1A_2=g_{m1}g_{m6}(r_{o2}\|r_{o4})(r_{o6}\|r_{o7})$

## Practices

- 8.2, 8.3, 8.4, 8.5, 8.6, 8.7
- 8.55, 8.60, 8.62
- 8.70, 8.71, 8.77
- 8.85, 8.86, 8.87, 8.91, 8.92
- 8.105, 8.110