###### tags: `computer organization` `test` `thu` {%hackmd theme-dark %} # 108期中(施工中) ## 1.請說明Big Endian和Little Endian的差異。請以儲存12345678H(4Byte)的資料作說明 - Big Endian: most-significant byte at least address of a word. - Little Endian: least-significant byte at least address. #### 位址 0 1 2 3 4 5 6 7 (BIG) : 1 2 3 4 5 6 7 8 #### 位址 0 1 2 3 4 5 6 7 (LITTLE) : 8 7 6 5 4 3 2 1 ## 2. 請說明`jr`與`jal`的用途與差異。 jr指令為使用暫存器的跳躍指令,跳躍位址在暫存器中,用於switch和程序返回 jal指令為帶有連結功能的直接跳躍指令,指令的跳躍地址在指令中,跳躍發生時把返回地址存放到R31暫存器中,用於程序呼叫。 ## 3. 請問下列每一項是否為RISC處理器的特性(features)? ### 題目缺失!!! ## 4.因為沒有暫存器搬移指令,請說明如何達到暫存器搬移功能,(please use $s1 move to $t2 as an example) ```MIPS= add指令建立move偽指令,即 move $s1,$t2 實際為add $s1, $0, $t2 ``` ## 5. If branch target is too far to encode with 16-bits offest(I format), 請舉例如何解決。(Please use beq and bne as an example) 當要跳過去的目標位置太遠無法用 16 bit 表達 可以改寫指令使存放 address 的 bit 更大 e.g.1. j and jal 有 26 bits e.g.2. >> beq $s0, $s1, L1 >>... >>... >>bne $s0, $s1, L2 >>j L1 >L2: ... ## 6. (題組) #### a. 請用圖示說明MIPS的定址法(Addressing): Register Addressing、Base Addressing、PC-Relative Addressing 及Pseudo direct Addressing。(搭配MIPS R-I-J指令格式解釋) - MIPS addressing mode ![](https://i.imgur.com/2x13H1B.gif) #### b. 說明Base Addressing, PC-Relative Addressing的差異。 - Base Addressing和PC-Relative Addressing的差異在於Base Addressing 在計算位址時是暫存器加上指令常數。 - PC-Relative Addressing 在計算位址時則是PC加上指令常數。 #### c. 為何Immediate Addressing最有效率? - immediate Addressing最有效率的原因是不需要去找位址。 ## 7. Please fill the blank each: ``` while(save[i] == k) i += 1 ``` ``` $s3 --> i $s5 --> k $s6 --> save[] ``` ![](https://i.imgur.com/FF0zadl.png) ``` Loop : sll $t1, $s3, 2 # i 乘 4 後存到$t1暫存器 add $t1, $t1,$s6 # 陣列的初始地址+$t1暫存器 就是save[i] 的地址 lw $to, 0($t1) # save[i] 的memory地址 載到CPU暫存器 $t0 bne $to, $s5,Exit # 如果 save[i] 不等於 k ,跳到Exit那一行 addi $s3,$s3,1 # i += 1 j Loop # 代表迴圈,會跳到Loop那一行 Exit: # 代表迴圈結束,結束程式 ``` 43 9 19 0 (不確定 ## 8.We have a processor with the following components , please draw the data path on those components for `add` and `sw` instructions respectively. ![](https://i.imgur.com/jKVII4h.png) ### a. `add rd, rs, rt` ![](https://i.imgur.com/KAvyR6v.png) ### b. `sw rs, offset(rt)` ![](https://i.imgur.com/mC9Oktk.png) ## 9. 何為 Pipeline Hazards (危障),與前饋(Forwarding)請詳述 Pipeline Hazards:在進行管線化時有些情況會導致下個指令無法正確執行 Forwarding: 不等到第一個指令將結果寫回,直接在第一個指令完成Execution 時將結果傳送給第二個指令的 Execution Input 。 ## 10. What is branch prediction technique for pipeline optimization? ![](https://i.imgur.com/Es5rjkO.jpg) ## 11. Please use the following example to demonstrate the results after applying the technologies of Delay Branch and Optimization of Delay Branch, respectively. (X, Y and Z is memory addresses, A, B, and C are registers,pipeline is I-E-D three stages, compiler will insert noop for pipeline stall) ![](https://i.imgur.com/8AoFTpe.png) | Address | Normal Branch | |:-------:| ------------- | | 0100 | `Load A, X` | | 0104 | `Add A, 1` | | 0108 | `Jump 0114` | | 010C | `Add A, B` | | 0110 | `Sub C, B` | | 0114 | `Store A, Z` | | 0118 | `Load A, Y` | ### a. Draw the pipeline diagram for delay branch with inserting noop. ![](https://i.imgur.com/8XnBIrG.jpg) ### b. Draw the pipeline diagram by using optimization of the delay branch. ![](https://i.imgur.com/fLTOf1a.jpg)