---
# System prepended metadata

title: Camera Info for FPGA
tags: [Research]

---

# Camera Info for FPGA

###### tags: `Research`

## D5M and D58 Camera Modules
- [D5M Camera Module](https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=68&No=281)
- [D8M Camera Module](https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&CategoryNo=68&No=1011)
- [Github link using the module](https://github.com/jlrandulfe/UviSpace)
- [Another Github Link](https://github.com/sahandKashani/TRDB_D5M)
- Interfaces using GPIO pins
- Output RGB Bayer Format: 2,004-row by 2,752-column
- ![](https://i.imgur.com/nSHbXSV.png)
- [Better Documentation](https://courses.cs.washington.edu/courses/cse467/08au/labs/Resources/THDB-D5M_Hardware%20specification.pdf)
- Assuming each pizel is 3 bytes, the total size is 2004*2752*3 = 16545024. With 7mb/s one image will take about 2.36 seconds (compression is probably required)
- Pros:
    - sold by Terasic
    - Lot of documentation
    - Many helpful examples to follow
- Cons:
    - Expensive (80-100 USD) 

## NTSC Input
- DE1-SoC also has NTSC input and an ADC for video input
- [Helpful Link about setting it up](https://hackaday.io/project/19945-video-capture-using-de1-soc-hps)
- [Another one with some code](http://people.ece.cornell.edu/land/courses/ece5760/DE1_SOC/DE1_soc_computer/Video_input/)
- Assuming each pixel is 3 bytes
- Pros:
     - Cheaper (40 USD)
     - In-built Decoder
- Cons:
    - Lower Resolution
    - Less Documentation