---
tags: MQI, Readout
---
# Photonic Readout Sheme
| Pro | Con |
| ------------------------------- | -------------------------------- |
| Low Heat Dissipation | Crosstalk with detector possible |
| No amplification required | Count Rate might be limited |
| No RF cable connection required | ... |
| ... | ... |

## Working Principle
### Microring modulators Basics
- Based on silicon microring resonator with with p–n junctions interleaved along the azimuthal dimension (see image below)
- The ring exhibits a sharp, notch-flter optical transmission with a stop-band at the desired resonant wavelength of the ring
- Applying a voltage across the junctions modulates the free carrier concentration (electrons and holes)
- Change in the free carrier concentration then changes the resonance frequency
- Depending on applied voltage/current the resonance frequency then can be controlled quite precicesly
- Modulation can be achieved with the output voltages of the sspd, also the low input impendace makes direct connection possible
### Forward and Backward biasing operation
- Forward Bias:
- $V > V_{ON}$
- The change in carrier density is due to carrier injection
- Exponential dependence of charge carrier density on voltage
- Modulation Efficiency: Up to 10.000 pm/V (@40µA)
- Reverse Bias:
- $V<0$
- The carrier density change comes from modifying the depletion region
- Weaker voltage dependence ($\sqrt{V}$)
- Increased sensitivity to doping density
- Modulation Efficiency: 16-250 pm/V
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### Dependence on Temperature
At RT foroward bias has several drawbacks such as high electrical power consumption and low modulation speed
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## SSPD Readout
| Step by Step |
| ------------------------------------ |
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## Critical Operation Parameters
### Biasing Current
### Modulation
## Fabrication
fabricated using a commercial high-performance 45 nm CMOS silicon-on-insulator (SOI) process
### CMOS with photonic modulator
- Fabrication of CMOS optical resonator and optical gratings necessary

- Dimensions of the ring:
- Example for 1550nm microring resonator
- Outer Radius: 10µm
- Width: 1.7µm
- Thickness: 100nm
- Material of microring: crystalline-silicon
- Different doping regions required, easy integration in CMOS process possible
- The chip can be fabricated using a commercial high-performance 45 nm complementary metal–oxide semiconductor (CMOS) silicon-on-insulator (SOI) process, without any modifcation to the process flow, in what is known as zero-change CMOS.
### Cyogenic Fiber attachement
### PCB / Interfacing Chip Design
- A PCB can be designed for interfacing the SSPD with the optical modulator CMOW chip.
- The PCB can be gold-plated on the bottom to ensure thermalization.
- Appropriate components on the PCB for cryogenic operation can be used
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For a more advanced technology inegrated in a product it is possible to integrate all the passive components in the CMOS chip to allow for direct interfacing between the modulator and SNSPD chips.
## Scalability
### Heat Dissipation
- Thermal load of the photonic modulator can be on the order of the biasing current, which is ~50µA, depending on the modulation strength one wants to achieve
### Optical Input for Readout
- Optical power for the modulator can be as low as ~10µW, when proper coupling efficiencies are achieved
- WDM Design
# Conclusion
# Sources
https://www.nature.com/articles/s41598-020-65971-5.pdf
https://static-content.springer.com/esm/art%3A10.1038%2Fs41598-020-65971-5/MediaObjects/41598_2020_65971_MOESM1_ESM.pdf
https://www.sciencedirect.com/science/article/pii/S0924424701007452
https://www.laserfocusworld.com/optics/article/14187644/100-gbits-optical-modulator-has-both-photonics-and-electronics-on-cmos-silicon