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SpArch: Efficient Architecture for Sparse Matrix Multiplication
2024.06.27 Paper link Background Huffman Tree 有一串數字，由小到大排列，最小值的節點開始合併 Overview
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DSP48E1
Structure image I/O port image Reg Ctrl Attribute Setting Description
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FlexSA: Flexible Systolic Array Architecture for Efficient Pruned DNN Model Training
2024.03.20 Paper link Background Systolic array image 上圖為SA的經典示意圖，因為往往access memory都比實際計算時間還要長，所以下面那個就是一個1D SA的範例，一次將同一個data隨時間傳遞給一整排的PE SA的優點是結構簡單且成本低，但缺點是靈活性很差，而且資料需要適當安排，下面以一個2D 3*3 SA為例
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Hardware Accelerator for Multi-Head Attention and Position-Wise Feed-Forward in the Transformer
CASLAB Group Meeting 2024.02.20 IEEE SOCC Paper link Background
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