# Discussing Requirement ## Original Features * Website https://github.com/curly-wei/roc-fpga ### Resource: has or has not * Documentation * Raw Circuit file * (?)Documentation for explain objective/function * Source Code * HDL-File * Top module * (?)ub module(component) * (?)seems raw modules of ACTEL * (?)in_lvds * (?)out_lvds * (?)BUFD * (?)seems user-defineds modules * (?)roc-dcm * (?)roc-block * ![](https://i.imgur.com/n0mpLic.png) * Without experience on ACTEL env. (DeWei) ### Target to modify ###### tags: `Discussion` `DeWei`