---
# System prepended metadata

title: SOC Design - Lab2

---

## Lab2 - FIR Filter (AXI-Master, AXI-Stream)
### Intro
學習兩種端口(AXI-Master/AXI-Stream)將資料從PS(Processing System)傳送至PL(Programable Logic)。

### What is Observed & Learned

1. Differences between MAXI and Stream interface
    - AXI-Master:
        - 傳輸須帶有地址，可傳至特定的地址
        - 可傳送指標/陣列參數
        - 輸入/輸出地址必須要是連續記憶體地址
        - 一條端口僅能一個讀+寫在一次的迴圈裡
    - AXI-Stream:
        - 傳輸不帶有地址
        - 不能傳送指標陣列參數
        - 可無限制突發傳送(burst transfer)
2. Differences between csim and cosim
    - C Simulation:
        - 僅驗證(Validation)Code是否可以通過testbench的測試集
    - C Co-simulation:
	    - 確認(Verification)Code生成出來的電路是否符合延遲時間

---

3. Framework
``` mermaid
flowchart LR
    PC1["PC"]
    B1["Juypter Web Server"]
    B2["iPython kernel"]
    B3["Ubuntu-based Linux"]
    B4["ARM A9/A53"]
    B5["Overlay"]
    subgraph "Internet"
        direction TB
        PC1
    end
    
    subgraph "ZYNQ7"

        subgraph "PS(Processing System)"
            direction TB
            PC1 -- "Upload bit/hwh" --> B1
            B1 --> B2 --> B3 --> B4
        end

        subgraph "PL(Programmable Logic)"
        B4 <-- "AXI-Master" --> B5
        B4 <-- "AXI-Stream" --> B5
        end
    end
```

4. Vivado
    - AXI-Master
    ![Vivado-AXI-Master](https://hackmd.io/_uploads/SyYEr6Ze6.png)
    - AXI-Stream
    ![Vivado-AXI-Stream](https://hackmd.io/_uploads/BJTHBp-lT.png)


### Result
1. Co-simulation
    - AXI-Master
    ![Co-simulation-AXI-Master](https://hackmd.io/_uploads/r1WXJ6Zxp.png)

    - AXI-Stream
    ![Co-simulation-AXI-Stream](https://hackmd.io/_uploads/HkjQypZeT.png)

2. Juypter Notebook
    - AXI-Master
    ![result_on_notebook-AXI-Master](https://hackmd.io/_uploads/HyyS03bga.png)
    ![result_FIR-AXI-Master](https://hackmd.io/_uploads/BkMDR3-gp.png)

    - AXI-Stream
    ![result_on_notebook-AXI-Stream](https://hackmd.io/_uploads/rJFU02bea.png)
    ![result_FIR-AXI-Stream](https://hackmd.io/_uploads/BJ-FC3Wep.png)

