Hardware Interrupt
Maskable Interrupt (multiplexing interrupts)
non-maskable interrupt,NMI (e.g., watchdog )
Software Interrupt, e.g., int 0x80~system call
Interrupt, ISR, top half, bottom half and multiplexing
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SLR:
Code executing from interrupt context cannot do the following:
What if, I want to do a huge amount of work upon receiving interrupts? So it is a problem, right? If we take more time to process, this will happen.
While the highest priority ISR is running, it doesn’t let other interrupts to run.
Interrupts with the same type will be missed.
To eliminate that problem, the processing of interrupts is split into two parts or halves:
Top halves
Bottom halves
There are 4 bottom half mechanisms are available in Linux:
Atomic context is an execution state of the Linux kernel in which kernel code monopolizes a CPU core. In this state, the Linux kernel may only perform operations that cannot sleep, as otherwise a system hang or crash may occur.
linux/interrupt.h
struct softirq_action
{
void (*action)(struct softirq_action *); //softirq handler
};
enum
{
HI_SOFTIRQ=0,
TIMER_SOFTIRQ,
NET_TX_SOFTIRQ,
NET_RX_SOFTIRQ,
BLOCK_SOFTIRQ,
IRQ_POLL_SOFTIRQ,
TASKLET_SOFTIRQ,
SCHED_SOFTIRQ,
HRTIMER_SOFTIRQ,
RCU_SOFTIRQ, /* Preferable RCU should always be the last softirq */
NR_SOFTIRQS
};
static struct softirq_action softirq_vec[NR_SOFTIRQS];