# TechReport: Suppressing inrush(surge) current when power on

## Phenomenon

* 
* 

## Solution

### Adopt LDO with **Soft-Start** such as MCP1727

* MCP1727 provide 300ms delay start when you parall C_3
* 
* 
* 
* For 300ms delay start, we hope Max inrush current < 1.5A
* Cmax = (5V)/(300ms)(1.5A) = 11.1F
* Higher Cmax would reduce VDCripple

## Note

* Actaully, MCP1727's performance is not good
* Refer to [here](https://electronics.stackexchange.com/questions/529102/why-ldo-regulator-rejected-ripple-better-than-normal-linear-regulator)
* But as first stage LDO is enougth

## Internal Soft-Start

[BD60HC5MEFJ](https://www.mouser.tw/datasheet/2/348/bdxxhc5mefj_lb_e-1874097.pdf)
* 600uF max capacitor with 1.5A/5V

## Reference

* [TI: Managing Inrush Current](https://www.ti.com/lit/an/slva670a/slva670a.pdf)
* [MCP1727 Datasheet](https://ww1.microchip.com/downloads/aemDocuments/documents/APID/ProductDocuments/DataSheets/MCP1727-1.5A-Low-Voltage-Low-Quiescent-Current-LDO-Regulator-20001999D.pdf)

###### tags: `TechReport` `DeWei` `HW-Circiut`