---
# System prepended metadata

title: 2022/12/31

---

# 2022/12/31


## Basic Info
- Member: 


## Description
We need to define the targeted workload, currently, we focus on the tflite-macro for reference to analyze the Operator of the Model

## Topic

### Topic #1 Workload Analysis
- Maintainer: [name=宏諺]
- Tasks
    - CMSIS Library Kernel Function
    - Variant Matrix Function unit
        - Quantize function unit
            - Quantize, Dequantize
        - Activation function
        - Max Pooling

### Topic #2 Baseline Matrix
- Maintainer: [name=宏諺], [name=岑晏]
- Task
    - [name=岑晏] Gem5 Matrix ISA implementation
        - [RISCV-Matrix Specs](https://drive.google.com/file/d/1fTs7fvoKILQJ4RHTT4KtaycpU29ECHtD/view?usp=sharing)
    - [name=宏諺] Define a reasonable function unit RTL design specs
        - OP
            - [Batch Matrix Multiplication](https://github.com/tensorflow/tflite-micro/blob/main/tensorflow/lite/kernels/internal/reference/batch_matmul.h)
            - [Fully Connected](https://github.com/tensorflow/tflite-micro/blob/main/tensorflow/lite/kernels/internal/reference/fully_connected.h)
            - [L2 Normalization](https://github.com/tensorflow/tflite-micro/blob/main/tensorflow/lite/kernels/internal/reference/l2normalization.h)
            - [Leaky Relu](https://github.com/tensorflow/tflite-micro/blob/main/tensorflow/lite/kernels/internal/reference/leaky_relu.h)
            - [Requantize](https://github.com/tensorflow/tflite-micro/blob/main/tensorflow/lite/kernels/internal/reference/requantize.h)
            - [Quantize](https://github.com/tensorflow/tflite-micro/blob/main/tensorflow/lite/kernels/internal/reference/quantize.h)
            - etc....
    - Define the specified cost function
        - RTL implementation
        - ALU Operation Cycles count

### Topic #3 Vector Processor Architecture
- Maintainer: [name=俊元], [name=Cherie]
- Tasks
    - Run current riscv benchmark for testing the vector processor
    - Understand Gem5 Architecture
    - Metrics
        - Instruction Number
        - Load Store Number
        - Function Unit Stall Cycles
        - Branch Instruction Number
        - Operators Performance

### Topic #4 Streaming Matrix Extension
- Maintainer: [name=宏諺]
- Tasks
    - (Top) Streaming Table Design
        - Regular Access Pattern
    - Systolic Array design for variant Operator

### Topic #5 Benchmark for matrix extension
- Maintainer: [name=Cherie]
- Description
    - Implement the intrinsics or benchmark
- Tasks
    - Compiler or Assembler modification
    - Assembly Macro Method



