# RVV
###### tags: `RVV`
* [筆記主連結](https://hackmd.io/@kksweet8845/HkVJYu2qq/https%3A%2F%2Fhackmd.io%2Fc%2FHkVJYu2qq%2Fedit%3Fedit)
[TOC]

## Instruction Overview
:::warning
[Vector Instruction Implementation Progress](https://docs.google.com/spreadsheets/d/186nahPc6tp_98MoqU2-kkvM9drK0JHD9gsD6sxQjUj0/edit?usp=sharing)
:::

## 會議記錄彙整
* [2022/05/05 Setup an environment and do tests](https://hackmd.io/rYQGSEkgR1-fXoJQOQAOBA?view)
* [2022/05/19 Impl Detail and Plan](https://hackmd.io/6sDYst8-SDeQSQOTQ1PXgA)
* [2022/06/23 Impl progress](https://hackmd.io/VnZglAPKQ6mTo7Rccr7gkA)
* [2022/07/07 RVV Arch](https://hackmd.io/MaYeeqRWSYyOsDaMI1Xi0A?view)
* [2022/07/21 Arch implement progress](https://hackmd.io/S08V031ITu2lljr04uMQvw?view)
* [2022/08/04 Arch implement progress](https://hackmd.io/qUpj0bp2T2WH5kaAScgT7w?view)
* [2022/08/18 Arch implement progress](https://hackmd.io/zBsMwKxpQvilioT1weEH5A)
* [2022/09/01 Arch implement progress](https://hackmd.io/ZopkD2SwRJeYJz22S40NJA?view)
* [2022/09/17 Arch implement progress](https://hackmd.io/MqQsOV0MSHCzTjJW5epLEg?view)
* [2022/10/01 Arch implementation Progress](https://hackmd.io/@kksweet8845/rkZcCFHGs)
* [2022/10/15 Arch Implementation Progress](https://hackmd.io/UqLO3M6hSlCttFip3eoeng)
* [2022/10/29 Arch Implementation Progress](https://hackmd.io/Al2rvHUXQgGtdFKGD2vO3Q)
* [2022/11/12 Arch Implementation Progress](https://hackmd.io/CO6Zvk14SeyfglH8tq3Dug)
* [2022/12/18 Matrix Extension Implementation](https://hackmd.io/x1VW9mtiSf2dmYHDHXt6fA)
* [2022/1/2 Matrix Extension Implementation](https://hackmd.io/oMg29CxoRj-JaJL2iSRofg)
* [2022/1/12 Matrix Extension Implementation]

---
* [KyleLiu progress](https://hackmd.io/ZnT7tOdfReqqy576E6VHMw)
* pepe996 progress report
* [2022/09/02 Learning material reading progress](https://hackmd.io/kI60TkIUT3GS0oUwMuza_A?view)
* [2022/09/09 Learning material reading progress](https://hackmd.io/qirA2LSRSyOHt8jpFUf_3g?view)
* [2022/09/17 Matrix extension(SME) research progress](https://hackmd.io/fat0YcnLTtah24zrmA5KPg?view)
* [2022/10/1 gem5 environment setup and running](https://hackmd.io/kNaIa0ZeS_i0nJ9xbiYnCA?view)
* [2022/10/15 RVV learning/gem5 ISA parser coding tracing](https://hackmd.io/OfJVzKbjQp-u0bpcgyMD7g?view)
* [2022/10/29 gem5 ISA parser coding tracing](https://hackmd.io/BMTcK2PpS26jGqJBllLX7g?view)
* [2022/11/12 gem5 ISA parser coding tracing](https://hackmd.io/6X5vhgNhQ0uGL_R3sLedsA?view)
* [2022/11/27 gem5 ISA parser vmask](https://hackmd.io/-aZ2D0vCRtmw5NvHO7VZfg?view)
* [2022/12/18 vmask unit test](https://hackmd.io/TDvMqBphQaqSOBpR71WKdA?view)

- TYHsiao [2022/11/12 gem5 ISA parser vaaddu](https://hackmd.io/wXAaxxQWTca_qozP0WNRNg?view)

## 架構
* [KyleLiu Thesis](https://hackmd.io/_HE5kHcISQqyI8IA1dJUuQ?view)
* [Github](https://github.com/kyle7158473/RISCV-VPU-Vbuffer)

## 筆記
- [Vector Arithmetic Instruction - OPFVV](https://hackmd.io/b3S3Gbj-TlOBcBVkZCOiSQ)
- [How to add a vector instruction](https://hackmd.io/tR-GcOpPSKWxZc_WTE2b1g?view)

## Related Paper
* [Implementing Vector Extensions to RISC-V in Gem5](https://zjkmxy.github.io/files/project_riscv_report.pdf)
* [A RISC-V Simulator and Benchmark Suite for Designing and Evaluating Vector Architectures](https://dl.acm.org/doi/fullHtml/10.1145/3422667)
* [Adaptable Register File Organization for Vector Processors](https://arxiv.org/pdf/2111.05301.pdf)
* [VIA: A Smart Scratchpad for Vector Units with Application to Sparse Matrix Computations](https://ieeexplore.ieee.org/document/9407226)
* [Software-Defined Vector Processing on Manycore Fabrics](https://dl.acm.org/doi/pdf/10.1145/3466752.3480099)
* [Capstan: A Vector RDA for Sparsity](https://dl.acm.org/doi/10.1145/3466752.3480047)
* [Unlimited Vector Extension with Data Streaming Support](https://www.inesc-id.pt/publications/16585/pdf/)
* [Speculative Vectorisation with Selective Replay](https://ieeexplore.ieee.org/document/9499938)
* [ZCOMP: Reducing DNN Cross-Layer Memory Footprint Using Vector Extensions](https://dl.acm.org/doi/10.1145/3352460.3358305)
* [Vicuna: A Timing-Predictable RISC-V Vector Coprocessor for Scalable Parallel Computation](https://drops.dagstuhl.de/opus/volltexte/2021/13932/pdf/LIPIcs-ECRTS-2021-1.pdf)
* [Vicuna - a RISC-V Zve32x Vector Coprocessor](https://github.com/vproc/vicuna)
* [Modeling Deep Learning Accelerator Enabled GPUs](https://hackmd.io/D0dKHBkbR2C8XKr63zRH8w)
* [RISC-VV: A Scalable RISC-V Vector Processor](https://hackmd.io/7dJ1VdmzRNqaWr7YTWGUiw)
* [RISC-V-Vector](https://github.com/ic-lab-duth/RISC-V-Vector)

## Materials
* [A Tutorial on the Gem5 Minor CPU Model](https://nitish2112.github.io/post/gem5-minor-cpu/)
* [ARM vs RISC-V Vector Extensions](https://erik-engheim.medium.com/arm-vs-risc-v-vector-extensions-992f201f402f)
* [Lecture 04 RISC-V ISA](https://passlab.github.io/CSCE513/notes/lecture04_RISCV_ISA.pdf)
* Andes Webinar
* [Part I](http://www.andestech.com/wp-content/uploads/Andes-RVV-Webinar-I.pdf)
* [Part II](http://www.andestech.com/wp-content/uploads/Andes-RVV-Webinar-II_final.pdf)
* [Part III](http://www.andestech.com/wp-content/uploads/Andes-RVV-Webinar-III.pdf)
* KyleLiu environment
* [riscv-toolchain](https://hackmd.io/RVWzls-_SdK72BHR2S51rg )
* [spike + pk](https://hackmd.io/6f76vg-VT1GqVhJ_m2E1LA )
* [LLVM](https://hackmd.io/0XsFB90_SeWg9dMLE9U-4g )
* [RISCV V-Extension & Benchmark](https://hackmd.io/-yYvJ5SoSgyr_O2_Ei_FQg )
* [QEMU](https://hackmd.io/6z9nQu2QSY22ROiV-Op6OA)
* [Build RISC-V tools:(riscv-toolchain + spike + pk + LLVM + RVV-benchmark)](https://hackmd.io/VtxTkJV-SP-N3JpE4AOuMg)
* [Build QEMU](https://hackmd.io/@nx1bTzFpQvaKD_yxYRmBaQ/S1l4siGA_)
* [How to simulate custom instruction](https://hackmd.io/ZsI50YxrQhKRHUF6gZswQA?both)
* [Build Vivado and run Aquila on NEXYS-VIDEO](https://hackmd.io/EKC_5i4vQ6GLcMvKyK9dFQ)
* [Build VCS and run Rocket-Chip](https://hackmd.io/VCo4E8aXQgWMCIxzt7gJiA)
* KyleLiu tutorial
* [RISC-V spec](https://riscv.org/wp-content/uploads/2017/05/riscv-spec-v2.2.pdf)
* [RISC-V Vector Extension Video](https://www.youtube.com/watch?v=oTaOd8qr53U&ab_channel=AndesTechnology)
* [RISC-V vector register programming](https://gms.tf/riscv-vector.html )

## Repo
- [caslab-gem5](https://github.com/nycu-caslab/gem5)
- [rvv-benchmark-suite](https://github.com/nycu-caslab/riscv-vectorized-benchmark-suite)
- [rvv-intrinsics](https://github.com/riscv-non-isa/rvv-intrinsic-doc)
- KyleLiu Repo
- [rocket-chip](https://github.com/chipsalliance/rocket-chip)
- [tutorial](https://zhuanlan.zhihu.com/p/140360043)
- [aquila](https://github.com/eisl-nctu/aquila)
- [warp-v](https://github.com/stevehoover/warp-v)
- [Hwacha Vector-Thread Co-Processor Sources](https://github.com/ucb-bar/hwacha )
- [RISC-V GPGPU verilog](https://github.com/vortexgpgpu/vortex)
- [mcpat](https://github.com/HewlettPackard/mcpat)