# SIC XE Assembler(系統程式 期末專題)
[toc]
## 專案介紹
- system program final project
## 專案報告
## 評分標準
- 
- 
## 報告內容
- 
### 流程圖
### ppt
- https://docs.google.com/presentation/d/1nKXi1Xg6CTJ1bo5Oqs35ipea_Fwn0Iv9/edit#slide=id.p12
## 格式
### 檔案格式
- 
## test program
- SIC
:::spoiler
```=
. comment
. indexed addressing
.. free format coding
. empty line detection
. . comand line user filenames input
COPY START 1000 . program start here
FIRST STL RETADR
CLOOP JSUB RDREC
LDA LENGTH
COMP ZERO
JEQ ENDFIL
JSUB WRREC
J CLOOP
ENDFIL LDA EOF
STA BUFFER
LDA THREE
STA LENGTH
JSUB WRREC
LDL RETADR
RSUB
EOF BYTE C'EOF'
THREE WORD 3
ZERO WORD 0
RETADR RESW 1
LENGTH RESW 1
BUFFER RESB 4096
.
.
.
RDREC LDX ZERO .. subroutine
LDA ZERO
RLOOP TD INPUT
JEQ RLOOP
RD INPUT
COMP ZERO
JEQ EXIT
STCH BUFFER ,X
TIX MAXLEN
JLT RLOOP
EXIT STX LENGTH
RSUB
INPUT BYTE X'F1'
MAXLEN WORD 4096
.
.
.
WRREC LDX ZERO . . subroutine
WLOOP TD OUTPUT
JEQ WLOOP
LDCH BUFFER, X
WD OUTPUT
TIX LENGTH
JLT WLOOP
TEST RSUB
OUTPUT BYTE X'05'
END FIRST
.. . end of this program
```
:::
- 
- SIC XE
1. 範例一
:::spoiler
```=
. comment
. indexed addressing
.. free format coding
. empty line detection
. . comand line user filenames input
COPY START 0 . program start here
FIRST STL RETADR
LDB #LENGTH
BASE LENGTH
CLOOP +JSUB RDREC
LDA LENGTH
COMP #0
JEQ ENDFIL
+JSUB WRREC
J CLOOP
ENDFIL LDA EOF
STA BUFFER
LDA #3
STA LENGTH
+JSUB WRREC
J @RETADR
EOF BYTE C'EOF'
RETADR RESW 1
LENGTH RESW 1
BUFFER RESB 4096
.
.
.
RDREC CLEAR X .. subroutine
CLEAR A
CLEAR S
+LDT #4096
RLOOP TD INPUT
JEQ RLOOP
RD INPUT
COMPR A,S
JEQ EXIT
STCH BUFFER,X
TIXR T
JLT RLOOP
EXIT STX LENGTH
RSUB
INPUT BYTE X'F1'
.
.
.
WRREC CLEAR X . . subroutine
LDT LENGTH
WLOOP TD OUTPUT
JEQ WLOOP
LDCH BUFFER, X
WD OUTPUT
TIXR T
JLT WLOOP
RSUB
OUTPUT BYTE X'05'
END FIRST
.. . end of this program
```
:::
- 
2. 範例二
- 
- 
- 
- 
## SIC XE 教學
### object code 格式
- object code 有分成 Format 2,3,4 :
- Format 3
- 3 Bytes
- 
- address part = displacement
- Format 4 (extended)
- 4 Bytes
- 
- address part = symbol address
- Format 2
- 2 Bytes
- opcode (8 bits) + first register(4 bits) + second register (4 bits)
- 
- nixbpe 的格式
- 
### 指令和定址模式
- 指令模式
- extended
- statement : `+op {operand}`
- 使用時機
- 當 address value 超過 12 bits (>= 4096)
- 差別
- address take 20 bits
- address value 直接用 symbol 的 address,而不是 displacement
- 定址模式
- immediate
- statement : `op #{operand}`
- 概念
- address value = operand itself
- 若 operand = constant 則 address = operand 轉 16 進位
- 若 operand = symbol 則 address = symbol address - program counter
- ex.
- 
- indirect
- statement : `op @{operand}`
- 概念
- address value = operand address (not value)
- 
- ex.
- 
- simple
- statement : `op {operand}`
- indexed
- statement : `op {operand},x`
- relative
- 先看 displacement 有沒有在 PC-relative 的範圍內(-2048~2047),如果超過就用 base-relative(0~4095),再超過就要用 extended
- PC-relative
- 概念
- 
- address value 存 displacement(symbol 實際的 address - program counter(存 next instruction address))
- ex.
- 
- base-relative
- 概念
- 
- address value 存 displacement(symbol 實際的 address - base register(由 programmer 指定))
- ex.
- 
- program relocation
- 概念
- loader 要將 object program 載入到 Mem 時,starting address 是不固定的(因為 multiprogramming,只要有足夠的 Mem space 就可以執行 program)
- 
- 時機
- 在 instruction use direct addressing 的時候
- 在 SIC XE 中,就是當 use format 4 and not immediate addressing
- 
- 
- 方法
- E record 前加上 M record(有幾個要 relocate 的地方就有幾個 M record)
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### 範例
1.
- program
- 
- 
- 
- object program
- 
2.
- program
- 
- object program
- 
### object program





### 實作方式
- 概念
- 有分為 one/two pass assembeler
- two pass : 先 scan 一次 program 產出中間檔,再 scan 一次產出 object program
- one pass : 僅 scan 一次就產出 object program
- 方法
- one pass
- 需解決 forward reference(使用到未定義的變數)
- 最後輸出的 object program 的順序要是原本的順序
## 補充
### opcode
:::spoiler
ADD 18
ADDF 58
ADDR 90
AND 40
CLEAR B4
COMP 28
COMPF 88
COMPR A0
DIV 24
DIVF 9C
FIX C4
FLOAT C0
HIO F4
J 3C
JEQ 30
JGT 34
JLT 38
JSUB 48
LDA 00
LDB 68
LDCH 50
LDF 70
LDL 08
LDS 6C
LDT 74
LDX 04
LPS D0
MULF 60
MULR 98
NORM C8
OR 44
RD D8
RMO AC
RSUB 4C
SHIFTL A4
SHIFTR A8
SIO F0
SSK EC
STA 0C
STB 78
STCH 54
STF 80
STI D4
STL 14
STS 7C
STSW E8
STT 84
STX 10
SUB 1C
SUBF 5C
SUBR 94
SVC B0
TD E0
TIO F8
TIX 2C
TIXR B8
WD DC
:::
### 程式執行過程
- 
- 
- 在 compile, load time 時的 logical 和 physical address 是相同的
- 當 compaction, swapping, pagging 的 execution time 時利用 MMU 將 logical address 轉換真正在記憶體的 physical address,此時的 logical address 和 physical 可能不一樣