# tc358870xbg parameter

main.h 檔須修改的參數
面板解析度 以196 x 196為例子
STX0_FPX 0 暫存器 0X500C
STX0_LPX 195 暫存器0x500E
還有 DRIVER IC 2A 2B 30 31 的參數

#ifndef __MAIN_H
#define __MAIN_H


#include <stdio.h>

#define TC358778XBG 0x0f //i2c slave address

//User modify start  
//Split Control Reg DSI_TX0
#define STX0_FPX 0   //start pixel
#define STX0_LPX 195 //End pixel

//RM6D020 
#define _2A2B3031
#define _2A 0x001800DB 
#define _2B 0x000000C3
#define _31 0x001800DB
#define _30 0x000000C3

//User modify end

#define STX0_WC_H (STX0_WC >> 8) & 0xFF
#define STX0_WC_L STX0_WC & 0xFF
#define STX0_FPX_H (STX0_FPX >> 8) & 0xFF
#define STX0_FPX_L STX0_FPX & 0xFF
#define STX0_LPX_H (STX0_LPX >> 8) & 0xFF
#define STX0_LPX_L STX0_LPX & 0xFF
#define _2A00 (_2A >> 24) & 0xFF
#define _2A01 (_2A >> 16) & 0xFF
#define _2A02 (_2A >> 8) & 0xFF
#define _2A03 _2A & 0xFF
#define _2B00 (_2B >> 24) & 0xFF
#define _2B01 (_2B >> 16) & 0xFF

#define _2B02 (_2B >> 8) & 0xFF
#define _2B03 _2B & 0xFF
#define _3100 (_31 >> 24) & 0xFF
#define _3101 (_31 >> 16) & 0xFF
#define _3102 (_31 >> 8) & 0xFF
#define _3103 _31 & 0xFF
#define _3000 (_30 >> 24) & 0xFF
#define _3001 (_30 >> 16) & 0xFF
#define _3002 (_30 >> 8) & 0xFF
#define _3003 _30 & 0xFF

#endif

</br>
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tc358870xbg 暫存器設定
ex : {6, 0x01, 0x08, 0x01, 0x02, 0x03, 0x04}
看Datasheet 0x0108 設定
6 表示後面一次丟6 bytes 資料
依序丟出 : 0x01, 0x08, 0x01, 0x02, 0x03, 0x04
0x01, 0x08 :
0x01 表示暫存器的MSB
0x08 表示暫存器的LSB
0x01, 0x02, 0x03, 0x04 :
0x01 -> 0x04 表示data的 LSB -> MSB

以下tc358870xbg 依序執行陣列中參數
tc358[][7] -> RM6D020[][7] -> split_dsi_tx_reg[][7]

static const uint8_t tc358[][7] =
{
    //Soft Reset
    {4, 0x00, 0x04, 0x04, 0x00},//Confctl0
    {4, 0x00, 0x02, 0x01, 0x3F},//SystemCtl Reset  操作
    {0xFE, 0x12}, //delay 1500 us ,usleep( )
    {4, 0X00, 0X02, 0x00, 0x00},//SystemCtl 
    {0xFE, 0x03}, //delay 300 us
    {4, 0x00, 0x06, 0x08, 0x00},//系統用Relclk 做clk來源
    {0xFE, 0x06},  //delay 600 us
    
    //0x84 0x85 HDMI Rx System Ctrl 
    //0x86 HDMI Rx Audio Ctrl
    
    // HDMI PHY	
    {3, 0x84, 0x10, 0x03}, // PHY CTL
    {3, 0x84, 0x13, 0x3F}, // PHY_ENB	
    {3, 0x84, 0xF0, 0x31}, //APLL_CTL
    {3, 0x84, 0xF4, 0x01}, // DDCIO_CTL	
    
    // HDMI Clock
    {4, 0x85, 0x40, 0xC0, 0x12}, // SYS_FREQ0_1 crystal 48MHz
    //{3, 0x86, 0x30, 0x00}, // LOCKDET_FREQ0	
    //{4, 0x86, 0X31, 0x53, 0x07}, // LOCKDET_REF1_2	
    //{3, 0x86, 0x70, 0x02}, // NCO_F0_MOD
    {4, 0x8A, 0x0C, 0xC0, 0x12}, // CSC_SCLK0_1
    
    // HDMI Interrupt Mask, Clear
    {3, 0x85, 0x02, 0xFF},// SYS_INT	
    {3, 0x85, 0x12, 0xFE},// SYS_INTM	
    
    // Interrupt Control (TOP level)
    {4, 0X00, 0X14, 0xBF, 0x0F},//InitStatus
    {4, 0x00, 0x16, 0xFF, 0x0F},//IntMask
    
    //EDID
    {3, 0x85, 0xE0, 0x01}, //EDID MODE
    {4, 0x85, 0xE3, 0x00, 0x01},//EDID_LEN1
    
    
    //Video Ouput Format Setting
    //{3, 0x8A, 0x00, 0x00},//VOUT_FMT
    //{3, 0x8A, 0x01, 0x14},//VOUT_FIL
    {3, 0x8A, 0x02, 0x42},//VOUT_SYNC0 0x42 default
    //{3, 0x8A, 0x08, 0x11},//VOUT_CSC
    
    // HDMI SYSTEM	
    {3, 0x85, 0x43, 0x02},// DDC_CTL
    {3, 0x85, 0x44, 0x11},// HPD_CTL
    
    //HDMI Source start access
    {3, 0x85, 0x4A, 0x01},// INIT_END	

    {4, 0x00, 0x02, 0x00, 0x00},
    {4, 0x00, 0x06, 0x08, 0x00},
    {0xFE, 0x01}, //delay 100 us ,usleep( )
    
    //DSI_TX0  
    {6, 0x01, 0x08, 0x01, 0x00, 0x00, 0x00},//DSI_TX_CLKEN
    {6, 0x01, 0x0C, 0x01, 0x00, 0x00, 0x00},//DSI_TX_CLKSEL
    {6, 0x02, 0xA0, 0x01, 0x00, 0x00, 0x00},//MIPI_PLL_CTRL
    {6, 0x02, 0xAC, 0xAF, 0x94, 0x00, 0x00},//!!!MIPI_PLL_CONF 250MHz ~ 500MHz, input division ratio = 10, feedback division = 176
    {0xFE, 0x14}, //delay 2 ms ,usleep( )

    {6, 0x02, 0xA0, 0x03, 0x00, 0x00, 0x00},//MIPI_PLL_CTRL
    {6, 0x01, 0x18, 0x11, 0x00, 0x00, 0x00},//LANE_EANBLE
    {6, 0x01, 0x20, 0x63, 0x0B, 0x00, 0x00},//!!!LINE_INIT_CNT = 2915
    {6, 0x01, 0x24, 0x00, 0x00, 0x00, 0x00},//!!!HSTX_TO_COUNT = 0
    {6, 0x01, 0x28, 0x01, 0x01, 0x00, 0x00},//FUNC_ENABLE 
    {6, 0x01, 0x30, 0x00, 0x00, 0x01, 0x00},//datasheet no DSI_TATO_COUNT 
    {6, 0x01, 0x34, 0x00, 0x50, 0x00, 0x00},//datasheet no DSI_PRESP_BTA_COUNT
    {6, 0x01, 0x38, 0x00, 0x00, 0x01, 0x00},//datasheet no DSI_PRESP_LPR_COUNT
    {6, 0x01, 0x3C, 0x00, 0x00, 0x01, 0x00},//DSI_PRESP_LPW_COUNT
    {6, 0x01, 0x40, 0x00, 0x00, 0x01, 0x00},//no DSI_PRESP_HSR_COUNT
    {6, 0x01, 0x44, 0x00, 0x00, 0x01, 0x00},//DSI_PRESP_HSW_COUNT
    {6, 0x01, 0x48, 0x00, 0x10, 0x00, 0x00},//datasheet no DSI_PR_TO_COUNT 
    {6, 0x01, 0x4C, 0x00, 0x00, 0x01, 0x00},//datasheet no DSI_LRX-H_TO_COUNT
    {6, 0x01, 0x50, 0x60, 0x01, 0x00, 0x00},//FUNC_MODE
    {6, 0x01, 0x54, 0x01, 0x00, 0x00, 0x00},//DSIRX_VC_ENABLE ,RXVC0_EN Virtual Channel-0 supported in LPRX path
    {6, 0x01, 0x58, 0xC8, 0x00, 0x00, 0x00},//IND_TO_COUNT = 200
    {6, 0x01, 0x68, 0x2A, 0x00, 0x00, 0x00},//datasheet no DSI_HSYNC_STOP_COUNT = 42
    {6, 0x01, 0x70, 0x9D, 0x06, 0x00, 0x00},//APF_VDELAYCNT = 1693
    {6, 0x01, 0x7C, 0x81, 0x00, 0x00, 0x00},//DSI_TX_MODE  
    {6, 0x01, 0x8C, 0x22, 0x00, 0x00, 0x00},//!!!DSI_HSYNC_WIDTH = 34
    {6, 0x01, 0x90, 0xBA, 0x02, 0x00, 0x00},//!!!DSI_HBPR = 698
    {6, 0x01, 0xA4, 0x00, 0x00, 0x00, 0x00},//DSI_RX_STATE_INT_MASK all no mask
    {6, 0x01, 0xC0, 0x15, 0x00, 0x00, 0x00},//DSI_LPRX_THRESH_COUNT = 21
    {6, 0x02, 0x14, 0x00, 0x00, 0x00, 0x00},//APP_SIDE_ERR_INT_MASK all no mask
    {6, 0x02, 0x1C, 0x80, 0x00, 0x00, 0x00},//DSI_RX_ERR_INT_MASK
    {6, 0x02, 0x24, 0x00, 0x00, 0x00, 0x00},//DSI_LPTX_INT_MASK
    {0xFE, 0x01}, //delay 100 us ,usleep( )
    {6, 0x02, 0x54, 0x02, 0x00, 0x00, 0x00},//!!!LPTXTIMECNT = 2
    {6, 0x02, 0x58, 0x02, 0x02, 0x13, 0x00},//!!!PPI_DPHY_TCLK_HEADERCNT TCLK_PrepareCnt = 2, TCLK-PreCnt = 2, TCLK_PREEZEROCNT = 19
    {6, 0x02, 0x5C, 0x06, 0x00, 0x06, 0x00},//!!!PPI_DPHY_TCLK_TRAILCNT TCLK_TrailCnt = 6, TCLK_ExitCnt = 6
    {6, 0x02, 0x60, 0x04, 0x00, 0x0A, 0x00},//!!!PPI_DPHY_THS_HEADERCNT THS_PrepareCnt = 4, THS_PREZEROCNT = 10
    {6, 0x02, 0x64, 0xEA, 0x4B, 0x00, 0x00},//!!!PPI_DPHY_TWAKEUPCNT = 19434
    {6, 0x02, 0x68, 0x0A, 0x00, 0x00, 0x00},//!!!PPI_DPHY_TCLK_POSTCNT = 10
    {6, 0x02, 0x6C, 0x05, 0x00, 0x06, 0x00},//!!!PPI_DPHY_THSTRAILCNT THS_TrailCnt = 5, THS_ExitCnt = 6
    {6, 0x02, 0x70, 0x20, 0x00, 0x00, 0x00},//!!!PPI_DPHY_HSTXVREGCNT = 32
    {6, 0x02, 0x74, 0x03, 0x00, 0x00, 0x00},//PPI_DPHY_HSTXVREGEN HSTX CLK Enable, HSTX Data Lane Enable 
    {6, 0x02, 0x78, 0x02, 0x00, 0x02, 0x00},//PPI_DSI_BTA_COUNT RXTASURECNT = 2, TXTAGOCNT = 2
    {6, 0x02, 0x7C, 0x02, 0x00, 0x00, 0x00},//PPI_DPHYTX_ADJUST 
    {6, 0x02, 0x88, 0xAA, 0x02, 0x00, 0x00},//PPI_DPHY_CAP 
    {6, 0x01, 0x1C, 0x01, 0x00, 0x00, 0x00},//DSITX_START 

    {0xFE, 0x0D}, //delay 1.3 ms ,usleep( )

    {0xFF, 0x00, 0x00}  //end mark
};

static const uint8_t RM6D020[][7] =
{
    {4, 0x05, 0x04, 0x15, 0x80},
    {4, 0x05, 0x04, 0xFE, 0x80},//page 0
#ifdef _2A2B3031  
    //2A Generic Long Write Packet with 5 bytes data 0x2A, NULL, 0x00, 0x0A, 0x01, 0xCF
    {4, 0x05, 0x04, 0x29, 0x80},
    {4, 0x05, 0x04, 0x05, 0x00},
    {4, 0x05, 0x04, 0x2A, _2A00},
    {4, 0x05, 0x04, _2A01, _2A02},
    {4, 0x05, 0x04, _2A03, 0x00},

    //2B Generic Long Write Packet with 5 bytes data 0x2B, NULL, 0x00, 0x00, 0x01, 0xC5
    {4, 0x05, 0x04, 0x29, 0x80},
    {4, 0x05, 0x04, 0x05, 0x00},
    {4, 0x05, 0x04, 0x2B, _2B00},
    {4, 0x05, 0x04, _2B01, _2B02},
    {4, 0x05, 0x04, _2B03, 0x00},

    //31 Generic Long Write Packet with 5 bytes data 0x31, NULL, 0x00, 0x0A, 0x01, 0xCF
    {4, 0x05, 0x04, 0x29, 0x80},
    {4, 0x05, 0x04, 0x05, 0x00},
    {4, 0x05, 0x04, 0x31, _3100},
    {4, 0x05, 0x04, _3101, _3102},
    {4, 0x05, 0x04, _3103, 0x00},

    //30 Generic Long Write Packet with 5 bytes data 0x30, NULL, 0x00, 0x00, 0x01, 0xC5
    {4, 0x05, 0x04, 0x29, 0x80},
    {4, 0x05, 0x04, 0x05, 0x00},
    {4, 0x05, 0x04, 0x30, _3000},
    {4, 0x05, 0x04, _3001, _3002},
    {4, 0x05, 0x04, _3003, 0x00},
#endif

    {4, 0x05, 0x04, 0x05, 0x00},
    {4, 0x05, 0x04, 0x12, 0x00},//partial mode on

    {4, 0x05, 0x04, 0x15, 0x00},
    {4, 0x05, 0x04, 0x35, 0x00},//TE

    {4, 0x05, 0x04, 0x15, 0x00},
    {4, 0x05, 0x04, 0x53, 0x20},//BC dimming off

    {4, 0x05, 0x04, 0x15, 0x00},
    {4, 0x05, 0x04, 0x51, 0xFF},//set britness

    {4, 0x05, 0x04, 0x15, 0x00},
    {4, 0x05, 0x04, 0x63, 0xFF},//HBM BCFF

    {4, 0x05, 0x04, 0x05, 0x00},
    {4, 0x05, 0x04, 0x29, 0x00}, //display on

    {0xFE, 0x02}, //delay 200 us ,usleep( )

  
};

static const uint8_t split_dsi_tx_reg[][7] = 
{
    //DSI  SETTING
    //TX0
    {4, 0x50, 0x00, 0x00, 0x00},//STX0_CTRL
    {4, 0x50, 0x08, STX0_WC_L, STX0_WC_H},//STX0_WC 1362 subpixel per line 這不影響可以不要
    {4, 0x50, 0x0C, STX0_FPX_L, STX0_FPX_H},//STX0_FPX Output Start Pixel
    {4, 0x50, 0x0E, STX0_LPX_L, STX0_LPX_H},//STX0_LPX Output End Pixel

    //
    {4, 0x00, 0x04, 0x37, 0x0C},//OK
    {4, 0x00, 0x06, 0x00, 0x00},//OK
    {6, 0x01, 0x10, 0x06, 0x00, 0x00, 0x00},//OK
    //{6, 0x03, 0x10, 0x06, 0x00, 0x00, 0x00},//OK    
    {0xFF, 0x00, 0x00}  //end mark
};