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# System prepended metadata

title: Shared Register notes

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# Shared Register notes

### Milestone 1: Implement a Multi-Reader, Multi-Writer Atomic Shared Register

#### Things I should use
- `std::sync::atomic`: there seems to be some ordering stuff here that can help to make sure that when an operation is performed, it is performed as an atom and not interrupted. The data structure used to implement the register must support atomicity, not sure which thing we can use here atm but will look around
    - TODO: Currently not sure which `Ordering` setup to use because I don't know which will ensure that read operations read the result of any concurrent write operations
- `Mutex` in the read and write functions to make sure that only one thread can access the register at once (TODO: Seems that if a read operation starts a mutex lock, then it won't read any concurrent writes...?)
- `Arc`: 
- `hyper`: Looks like the hyper crate is the move for the HTTP server which will implement our HTTP API for the two functions. The other crates seem to have a bunch of additional functionality I don't need 

#### Steps

1. Write a Trait `AtomicRegister` with the func sigs for read and write
2. Implement the `SharedRegister` as a struct that stores a pointe. We use a pointer because we don't want to copy then modify the string in each write operation, its more efficient to simply update the pointer and drop the old string. The pointer must support atomic ops.
3. Write an `impl` for `SharedRegister` that implements the `read` and `write` methods on it.
4. Use the `hyper` crate to write an HTTP server
    - TODO: what addr should I be binding to, should we treat this as a toy and go with the localhost or somehow make it real and use the IP of the machine itself? 
    - TODO: The server should be multi-threaded in order to allow multiple requests to be handled at once, but this is safe because the use of `Arc`, `Mutex`, and atomics ensures that many threads can own the SharedRegister, but read and write are Mutexed, and happen atomically. This should meet all three of our requirements

### Milestone 2: Compose Shared Registers Into a Shared Memory Bank

