# O-RAN.WG7.FHGW-HRD.0-v01.00
###### tags: `Spec`

### O-RAN White Box Hardware Working Group Hardware Reference Design Specification for Fronthaul Gateway
* split architecture
* FHGW (Fronthaul Gateway) may be placed with the following O-RAN specified interfaces
* The interface between O-DU and FHGW is Open Fronthaul (Option 7-2x).
* The interface between FHGW and RU is an LLS option specified by O-RAN.
* The interface between FHGW and RU may not support Open Fronthaul (Option 7-2x).


* Low PHY function in the fronthaul gateway converts the CPRI/low level split interface between the RU and Open Fronthaul (Option 7-2x).
* using a packet-based network
###

    * point-to-point
        direct connect
    * mesh
        connect through other network element

* need two interfaces for connectivity towards the O-DUs

### low PHY function
1) FFT/IFFT (Lower-PHY DL/UL)
2) PRACH detection (Lower-PHY UL)
3) Handling of C-Plane/M-plane messages
4) Timing and synchronization of RU
5) eCPRI framing/de-framing and switching
6) CPRI framing/de-framing and switching
7) CPRI to eCPRI conversion
8) I/Q compression on eCPRI and CPRI links

### Timing
* WG4 CUS specification
* uses SyncE and PTP to provide frequency, phase and Time-of Day to necessary endpoints.


## Hardware Architecture and Requirements
* In case of a FHGW, the combination of RU and FHGW acts as an O-RU


* Network Processing Unit
* provides the packet transport functions of the FHGW.
* Radio Signal Processor/Accelerator
* from the low-level split-8 to O-RAN fronthaul interface (Split 7-2)
* implements the Low PHY capabilities mentioned in section
* can be implemented using a FPGA, DSP engine or ASICs
* CPU
* controls the transport capabilities and the Radio software which controls the radio signal processor
* Memory
* used to store the runtime data and software for the NOS and Radio software
* Storage
* store operating system, application software, firmware, operational status of Fronthaul Gateway
* Timing Components
* used to implement IEEE 1588 PTP and Synchronous Ethernet functionalities.
* key components
* GNSS
* OCXO
* DPLL
* Servo
* GNSS
* Global Navigation Satellite System provides Time of the Day and Synchronization pulse (PPS) to the timing module to recover the clock and phase
* OCXO(Oven controlled crystal oscillator)
* provides the stable reference clock to the timing module with reference to which the PTP clock is generated
* used to validate the other recovered clocks are within the required PPM offset or not
* DPLL(Digital Phase lock loop)
* generate the PTP clock steered by the servo algorithm
* ensures that the generated clock meets the required specifications in terms of Jitter
* Servo
* analyses the timestamps from the ethernet packets, performs appropriate filtering and steers the DPLL to generate the PTP clock and Phase alignment of the clock to the primary clock source.
* Ethernet PHY
* physical level ethernet connectivity