---
# System prepended metadata

title: Digital Design Lab 3 - From Idea To Design
tags: [IUG, Computer Engineering, Digital Design, Digital]

---

---
description: In this lab, we are going to talk about how to convert your ideas to the actual design, we will start by analysing the idea, extracting inputs, finally, we will talk about how to optimize your design in different ways.
---
<h1 style='border: none'><center>Digital Design Lab 3</center></h1>
<h2 style='border: none'><center>From Idea To Design</center></h2>
<h5><center>The Islamic University of Gaza<br>Engineering Faculty<br>Department of Computer Engineering</center></h5>
<h6>Author: Mohammed Nafiz ALMadhoun<span style="float:right">2021/10/11</span></h6>

---
## Introduction

<p style='text-align:justify'>
In this lab, we are going to talk about how to convert your ideas to the actual design, we will start by analysing the idea, extracting inputs, finally, we will talk about how to optimize your design in different ways.
</p>

## Analyzing Idea
In this section, we will learn how to build a system from an idea to real logic gates, note that these designs will not have any memory element.

### Extracting Inputs and Outputs
<p style='text-align:justify'>
When you think about any system you interact with, you should notice that you won't know the internals of that system, but you rather know what is the inputs, outputs of this system.
</p>

If we take the coffee machine as an example, you know that the inputs of that system are:
- Money
- Suger Amount
- Drink Choice

and the outputs are:
- The Drink!
- The Change

Now, for any other system and ideas, you will come with, you should start first by analyzing the inputs and outputs of your system.

<div style="page-break-after: always;"></div>

### Inputs & Outputs Relations

<p style='text-align:justify'>
The output of the system should be expected from the inputs, you won't expect a cup of Espresso if you ordered a French Coffee from the coffee machine.
Even for systems that appear to generate random outputs, there are inputs (e.g. Time).
</p>


<p style='text-align:justify'>
So After knowing your inputs & outputs, you should find the relation between the inputs and the outputs.
</p>

### Design & Optimization

<p style='text-align:justify'>
Now, it's time to design your system, by knowing the relations between inputs and outputs, you could easily write the truth table for the system, and convert the truth table to boolean expressions then gates.
</p>

<p style='text-align:justify'>
The final step will be optimizing your design, the word optimizing could mean a lot of things for example:

- Minimum Resources
- Faster Speed
- Lower Budget
</p>

So you should focus on what you're going to optimize for (e.g today you will optimize your design to use only `NAND` gates because of your limited resources 😶)

## Sum-Of-Products

<p style='text-align:justify'>
One of the easiest methods to design your system is to use the sum of products technique, and it is pretty easy and systematic, after creating your truth table, you should write the boolean expression that makes a single line true, then sum them all together (By adding OR between each expression),
After that, you will just optimize your last boolean expression.
</p>

<div style="page-break-after: always;"></div>
 
## Universal Gates
We've talked in the previous labs about the `NAND` and `NOR` gates, and mentioned that these are also called universal gates.

The `NAND` and `NOR` are universal because we can create any other gate using one of them, please return to section 3.6 in your textbook to understand more.

So, for your small lab at home try to buy a lot of `NAND` or `NOR` gates, here is a revision on how to create different gates using NAND:
1. Inverter

<center>

![Inverter Using NAND](https://i.imgur.com/WaKOUUq.png)
$O=\overline{A.A} = \overline{A}$
</center>

2. AND Gate

<center>

![AND Using NAND](https://i.imgur.com/Arj7kEy.png)
$O=\overline{\overline{A.B}} = A.B$
</center>

3. OR Gate

<center>

![OR Using NAND](https://i.imgur.com/zfZTVpc.png)
$O=\overline{\bar{A}.\bar{B}} = A + B$
*Using De Morgan's laws*
</center>

4. XOR Gate

<center>

![XOR Using NAND](https://i.imgur.com/1jylO4T.png)
$O=\overline{(\overline{A.\overline{A.B}}).(\overline{B.\overline{A.B}})} = A.\overline{A.B} + B.\overline{A.B} = \overline{A.B}.(A+B) = A \oplus B$
*Don't worry about it* 🤯
</center>

<div style="page-break-after: always;"></div>

## Chapter 3 Notes
**NOTE:** Please read Chapter 3 in your textbook very carefully, it is a very important chapter, and each minimization method is very important and useful, and here is a list of examples:
- If your truth table has a lot of ones, **product-of-sums** will be easier and more efficient than **sum-of-products**.
- Solving **K-Map** is easier than doing boolean algebra, and it's systematic.
- **Don't-Care** conditions are very important, and you should look at them carefully, they will do a huge difference in your design.

## Lab Tasks

### Task 1: Design half-adder

The **half-adder** is a thing that could add two bits together, design the half-adder, fill its truth table, then write to boolean expression for its outputs.

### Task 2: Simulate half-adder

In this task, you should convert your previous design to only `NAND` gates, then you should simulate it once using **gates**, and the other using **ICs**.

Test your design, and ensure that you go the output correctly.

### Task 3: Build half-adder

After simulating the half-adder, you should build it using `NAND` IC, which is 74/00.

Please find the datasheet here:

74/00: https://cdn.datasheetspdf.com/pdf-down/7/4/L/74LS00_FairchildSemiconductor.pdf

<span style="color:#e20000" >**DON'T POWER UP THE KL-31001 WITHOUT MY PERMSIONS.**</span>
###### tags: `Digital Design` `Digital` `IUG` `Computer Engineering`
<center>End Of Lab 3</center>