# Logic Gate ###### tags: `computerArchitecture` `digitalLogic` > [TOC] [Reference Video](https://www.youtube.com/watch?v=Mzy0RG9Z1Ak) ## Not ```hdl= // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Not.hdl /** * Not gate: * out = not in */ CHIP Not { //declare input/output pin IN in; OUT out; PARTS: // Put your code here: Nand(a=in, b=in, out=out); } ``` ### Simulation Open the simulator ![](https://i.imgur.com/nQInDrD.png) Load chip hdl File load script tes File ![](https://i.imgur.com/qjOz85H.png) ## OR ```dhl= // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Or.hdl /** * Or gate: * out = 1 if (a == 1 or b == 1) * 0 otherwise */ CHIP Or { IN a, b; OUT out; PARTS: // Put your code here: Not(in=a, out=notA); Not(in=b, out=notB); Nand(a=notA, b=notB, out=out); } ``` ![](https://i.imgur.com/iVJjKQZ.png) ![](https://i.imgur.com/L0ZvL8b.png) ![](https://i.imgur.com/iOizskE.png) ![](https://i.imgur.com/geIJK44.png) ## AND ```DHL= // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/And.hdl /** * And gate: * out = 1 if (a == 1 and b == 1) * 0 otherwise */ CHIP And { IN a, b; OUT out; PARTS: // Put your code here: Nand(a=a,b=b,out=aNandB); Not(in=aNandB, out=out); } ``` ## XOR ```hdl= // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Xor.hdl /** * Exclusive-or gate: * out = not (a == b) */ CHIP Xor { IN a, b; OUT out; PARTS: // Put your code here: //phase 1 And(a=a, b=b, out=AandB); //phase 1 Or(a=a, b=b, out=AorB); Not(in=AorB, out=notAorB); //phase 2 Or(a=AandB, b=notAorB, out=output2); Not(in=output2, out=out); } ``` ![](https://i.imgur.com/a2B2PY3.png) ![](https://i.imgur.com/z4HAU7d.png) ![](https://i.imgur.com/OuRlBg2.png) ![](https://i.imgur.com/qPxNQkD.png) ## Multiplexer or Mul Multiplexer just be like if-else selector. Core concept: Use the selector to control input input A or input B ![](https://i.imgur.com/m1Ti9fZ.png) ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Mux.hdl /** * Multiplexor: * out = a if sel == 0 * b otherwise */ CHIP Mux { IN a, b, sel; OUT out; PARTS: // Put your code here: //phase 1 Not(in=sel, out=notSel); And(a=a, b=notSel, out=aAndNSel); And(a=b, b=sel, out=bAndNotSel); //phase 2 Or(a=aAndNSel, b=bAndNotSel, out=out); } ``` ![](https://i.imgur.com/CWtPlYJ.png) ## Demultiplexer ![](https://i.imgur.com/Zwu2sbB.png) ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/DMux.hdl /** * Demultiplexor: * {a, b} = {in, 0} if sel == 0 * {0, in} if sel == 1 */ CHIP DMux { IN in, sel; OUT a, b; PARTS: Not(in=sel, out=notIn); And(a=in, b=notIn, out=a); And(a=in, b=sel, out=b); } ``` ## 16-bit Not ### Two-bit not gate if we can draw two-bit not gate then we can generalize 16-bit not gate Make input and output two bytes ![](https://i.imgur.com/KKmYYMI.png) ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Not16.hdl /** * 16-bit Not: * for i=0..15: out[i] = not in[i] */ CHIP Not16 { IN in[16]; OUT out[16]; PARTS: // Put your code here: Not(in=in[0], out=out[0]); Not(in=in[1], out=out[1]); Not(in=in[2], out=out[2]); Not(in=in[3], out=out[3]); Not(in=in[4], out=out[4]); Not(in=in[5], out=out[5]); Not(in=in[6], out=out[6]); Not(in=in[7], out=out[7]); Not(in=in[8], out=out[8]); Not(in=in[9], out=out[9]); Not(in=in[10], out=out[10]); Not(in=in[11], out=out[11]); Not(in=in[12], out=out[12]); Not(in=in[13], out=out[13]); Not(in=in[14], out=out[14]); Not(in=in[15], out=out[15]); } ``` ## 16-bit AND it's going to be very similar conceptual to our 16-bit Not ![Uploading file..._mdlkgkw3f]() ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/And16.hdl /** * 16-bit bitwise And: * for i = 0..15: out[i] = (a[i] and b[i]) */ CHIP And16 { IN a[16], b[16]; OUT out[16]; PARTS: // Put your code here: And(a=a[0], b=b[0], out=out[0]); And(a=a[1], b=b[1], out=out[1]); And(a=a[2], b=b[2], out=out[2]); And(a=a[3], b=b[3], out=out[3]); And(a=a[4], b=b[4], out=out[4]); And(a=a[5], b=b[5], out=out[5]); And(a=a[6], b=b[6], out=out[6]); And(a=a[7], b=b[7], out=out[7]); And(a=a[8], b=b[8], out=out[8]); And(a=a[9], b=b[9], out=out[9]); And(a=a[10], b=b[10], out=out[10]); And(a=a[11], b=b[11], out=out[11]); And(a=a[12], b=b[12], out=out[12]); And(a=a[13], b=b[13], out=out[13]); And(a=a[14], b=b[14], out=out[14]); And(a=a[15], b=b[15], out=out[15]); } ``` ## 16-bit OR ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Or16.hdl /** * 16-bit bitwise Or: * for i = 0..15 out[i] = (a[i] or b[i]) */ CHIP Or16 { IN a[16], b[16]; OUT out[16]; PARTS: or(a=a[0], b=b[0], out=out[0]); or(a=a[1], b=b[1], out=out[1]); or(a=a[2], b=b[2], out=out[2]); or(a=a[3], b=b[3], out=out[3]); or(a=a[4], b=b[4], out=out[4]); or(a=a[5], b=b[5], out=out[5]); or(a=a[6], b=b[6], out=out[6]); or(a=a[7], b=b[7], out=out[7]); or(a=a[8], b=b[8], out=out[8]); or(a=a[9], b=b[9], out=out[9]); or(a=a[10], b=b[10], out=out[10]); or(a=a[11], b=b[11], out=out[11]); or(a=a[12], b=b[12], out=out[12]); or(a=a[13], b=b[13], out=out[13]); or(a=a[14], b=b[14], out=out[14]); or(a=a[15], b=b[15], out=out[15]); } ``` ## 16-bit Mux ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Mux16.hdl /** * 16-bit multiplexor: * for i = 0..15 out[i] = a[i] if sel == 0 * b[i] if sel == 1 */ CHIP Mux16 { IN a[16], b[16], sel; OUT out[16]; PARTS: // Put your code here: Mux(a=a[0], b=b[0], sel=sel, out=out[0]); Mux(a=a[1], b=b[1], sel=sel, out=out[1]); Mux(a=a[2], b=b[2], sel=sel, out=out[2]); Mux(a=a[3], b=b[3], sel=sel, out=out[3]); Mux(a=a[4], b=b[4], sel=sel, out=out[4]); Mux(a=a[5], b=b[5], sel=sel, out=out[5]); Mux(a=a[6], b=b[6], sel=sel, out=out[6]); Mux(a=a[7], b=b[7], sel=sel, out=out[7]); Mux(a=a[8], b=b[8], sel=sel, out=out[8]); Mux(a=a[9], b=b[9], sel=sel, out=out[9]); Mux(a=a[10], b=b[10], sel=sel, out=out[10]); Mux(a=a[11], b=b[11], sel=sel, out=out[11]); Mux(a=a[12], b=b[12], sel=sel, out=out[12]); Mux(a=a[13], b=b[13], sel=sel, out=out[13]); Mux(a=a[14], b=b[14], sel=sel, out=out[14]); Mux(a=a[15], b=b[15], sel=sel, out=out[15]); } ``` ## 8 way OR ![](https://i.imgur.com/lVEUZ1q.png) ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Or8Way.hdl /** * 8-way Or: * out = (in[0] or in[1] or ... or in[7]) */ CHIP Or8Way { IN in[8]; OUT out; PARTS: // Put your code here: //phrase 1 Or(a=in[0], b=in[1], out=or1); Or(a=in[2], b=in[3], out=or2); Or(a=in[4], b=in[5], out=or3); Or(a=in[6], b=in[7], out=or4); //phrase2 Or(a=or1, b=or2, out=layer2or1); Or(a=or3, b=or4, out=layer2or2); Or(a=layer2or1, b=layer2or2, out=out); } ``` ## 4-Way Demux 4-way and 8-way muxes and d-muxes not actually difficult but they are complicated, it's very easily to lose yourself or lose track of what you're doing in the middle of it. ![](https://i.imgur.com/ufMFPn8.png) ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/DMux4Way.hdl /** * 4-way demultiplexor: * {a, b, c, d} = {in, 0, 0, 0} if sel == 00 * {0, in, 0, 0} if sel == 01 * {0, 0, in, 0} if sel == 10 * {0, 0, 0, in} if sel == 11 */ CHIP DMux4Way { IN in, sel[2]; OUT a, b, c, d; PARTS: // Put your code here: //phase 1 DMux(in=in, sel=sel[1], a=DmuxA1, b=DmuxB1); //pahse 2 DMux(in=DmuxA1, sel=sel[0], a=a, b=b); DMux(in=DmuxB1, sel=sel[0], a=c, b=d); } ``` 8-Way Demux this is the four-way d-mux only even more, I'm not to going to draw this one ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/DMux8Way.hdl /** * 8-way demultiplexor: * {a, b, c, d, e, f, g, h} = {in, 0, 0, 0, 0, 0, 0, 0} if sel == 000 * {0, in, 0, 0, 0, 0, 0, 0} if sel == 001 * etc. * {0, 0, 0, 0, 0, 0, 0, in} if sel == 111 */ CHIP DMux8Way { IN in, sel[3]; OUT a, b, c, d, e, f, g, h; PARTS: DMux(in=in, sel=sel[2], a=abcd, b=efgh); DMux4Way(in=abcd, sel=sel[0..1], a=a, b=b, c=c, d=d); DMux4Way(in=efgh, sel=sel[0..2], a=e, b=f, c=g, d=h); } ``` 4way 16-bit demux ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Mux4Way16.hdl /** * 4-way 16-bit multiplexor: * out = a if sel == 00 * b if sel == 01 * c if sel == 10 * d if sel == 11 */ CHIP Mux4Way16 { IN a[16], b[16], c[16], d[16], sel[2]; OUT out[16]; PARTS: Mux16(a=a, b=b, sel=sel[0], out=mux1Out); Mux16(a=c, b=d, sel=sel[0], out=mux2Out); Mux16(a=mux1Out, b=mux2Out, sel=sel[1], out=out); } ``` 8 way 16-bit mux It's very simple, since it just reverse logic with 8 way 16-bit demux which have implemented. Basically, we just flip it and then we can get the answer. ``` // This file is part of www.nand2tetris.org // and the book "The Elements of Computing Systems" // by Nisan and Schocken, MIT Press. // File name: projects/01/Mux8Way16.hdl /** * 8-way 16-bit multiplexor: * out = a if sel == 000 * b if sel == 001 * etc. * h if sel == 111 */ CHIP Mux8Way16 { IN a[16], b[16], c[16], d[16], e[16], f[16], g[16], h[16], sel[3]; OUT out[16]; PARTS: // Put your code here: Mux4Way16(a=a, b=b, c=c, d=d, sel=sel[0..1], out=Mux1Output); Mux4Way16(a=e, b=f, c=g, d=h, sel=sel[0..1], out=Mux2Output); Mux16(a=Mux1Output, b=Mux2Output, sel=sel[2], out=out); } ```