Lien de la note Hackmd
Lien du livre du prof
Slide du cours
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La correction d'erreur "normale" est tres differente de celle de l'informatique quantique
QEC Zoo
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Envoyer un Qubit
Principe general
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Shor 9 error correction code
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Surface code QEC
QEC adapted to 2D bit architectures like with superconductors from Google
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Au-dessus de 20 qubits, on a trop d'erreurs
AlissonBob, Amazon et UCI pretendent pouvoir reduire le nombre de qubits physiques necessaires pour faire des calculs.
More on quantum computing speed
Quand on fait une operation de portes sur des qubits intriques, c'est comme si on faisait cette operation sur plusieurs etats.
On va prendre une porte de Hadamard: on a une vingtaine d'operations.
Or, d'apres IBM, comme le calcul quantique est probabiliste il faut l'executer plusieurs fois, cad fois.
portes executees pour juste une porte de Hadamard !
:::
De meme, pour les autres portes:
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On veut corriger le taux d'erreur pour utiliser le moins de qubits physiques possible
Qubits connectivity
IBM
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Rocheser 53 qubits, october 2019
65 qubits, october 2020
Google
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Sycamore 53 qubits, october 2019
Pourquoi un qubit blanc ?
Parce qu'il marche pas ptdr
IonQ
Cas particulier des ions pieges
Ils sont tous connectes les uns aux autres
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"Rackability" examples
Pasqual
Double depth racks
- Model of cold atoms computer with qubits, planned for
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Quandela
Single depth rack
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Data center constraints
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Combien est-ce que ca consomme dans un data center ?
Je sais pas / ca depend
Olivier EzrattyTue, Oct 12, 2021 4:50 PM
Ca depend du nombre de rack
Cooling
Goal: reduce thermal noise affecting qubits
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Micro-waves sources
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Chaque fils supra-conducteur coute $
Details from a 15 mK cryostat
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Some companies
Dilutions and systems
- Finland
- US:
- UK:
- Oxford instruments
- Microsoft
- DWave
- France:
- Netherlands:
Cabling
Pulse tubes and compressors
Available cooling power
Cryostat |
pulse tubes |
minimum temperature |
20mK stage |
100 mK stage |
MC cold plate |
Bluefors |
lD250 XLF400 XLD1000 |
1 2 2 |
10mk 8 mK 8 mK |
W W W |
W W W |
IBM
Goldeneye fridge designed for 1121 qubits Condor completion planned for 2023.
5 and 14 days to cool down.
design shown is not fake

- Cabling paths shows they will use some sort of cryoCMOS
- using separate pulse tubes to and bottom