---
# System prepended metadata

title: 'Regular Meeting Logs - May 11th, 2021'
tags: ['Tag(Keio team, Quanray team)']

---

# Regular Meeting Logs - May 11th, 2021

###### tags: `Tag(Keio team, Quanray team)`

| Features        |   Data                  |
| ----------------|:----------------------- |
| Project:        | MSMA LSI Tag Development|
| Facilitator:    | Jin Mitsugi, Hao Min    |
| Date:           | May 11th, 2021          |
| Time:           | 13:30-14:30 Beijing Time|
| Attendees:      | Hao Min, Jin Mitsugi, Jiabin Zhou, Qingsong Zhang, Yuxiao Zhao, H. Takahashi, Yichao, Vrishti Shersia                             |
| Logger:         | Vrishti Shersia         |

## :memo: Logs
## Action Items updates 
* [new] Quanray will provide a detailed simulation model and FPGA implementation for the Duplex method due on May 25th: Regarding the parallel layout of demodulator and matched filter explanation is required. Simulation and design are going on in Quanray->Agreed to have subcarrier but subcarrier frequency needs to be lowered like 10kHz to avoid spurious signals. Keio shared its analysis and simulation code for further analysis. 
* [cont] Modified FPC Design and Delivery: Additional FPCs to be sent by Quanray->open Kuanfeng reported its completion and delivery to E-garde. 
* [cont] Reason behind the Discontinuous frequency characteristics in Type C and Type D CoB->Related to sensor channel. Let us close this one. 
* [cont] Battery-Assisted mode examination: Keio will check another tags->open. 
* [cont] Requirements to the new RFIC shall be clarified (Keio): The updated Jupiter 2 spec. https://msma-prj.autoidlab.jp/attachments/394 by providing a plan on :

  * Block illustration of the RFIC has been provided
  * Description of STRM (Sync) subcarrier and waveform. 
  * Description of pattern of downlink to send STRM (Stop). 
  * External Voltage Booster execution: Quanray provided booster regulators and Keio is conducting tests. 
  * Quanray to check the possibility of whether the analog sensor could be supported by Jupiter2 with 4ksps with 16bits->16bits @ 2MHz is possible. Quanray to share the relationship between possible sampling frequency, bit resolution. 
* [new] Quanray to try to buy and implement die of ADXL-362 from ADI to implement into the package: Keio recommends Quanray to give the chip to ADI for implementation and design the chip for the MEMS circuitry->open
* [new] The process of contract through Toppan to be initiated in May->open
* [cont] Production and Delivery of Type-A PCBs(20)->open 

## Conclusions: 

* Quanray to provide :
  * Documents on STRM(Stop)
  * Analog Sensor ADC : Equation of the sampling rate and no. of channels.
  * The voltage translation between a battery assisted sensor and the RFIC needs to be clarified. 
* Quanray to send 10 completed FPCs after soldering the RFIC, ADXL-362 and the capacitor. 
* Keio recommends Quanray to connect ADXL-362 inside the package to the External SPI Sensor. The RFIC, internal SPI sensor chip (ADXL-362), shall be packaged into one chip to form SiP. The RFIC shall be packaged with the internal SPI sensor. 
* Keio checked the Decimation duplex forward link parameter to find the relationship between the bit rate and subcarrier frequency of the forward link.
* DCO frequency lock and unlock has been explained by Keio which includes the destination sensor selection. This implementation is important as RFIC cannot determine the destination of SPI_WRITE/READ command. 

## Next Meeting:

* May 25th, 2021 13:30-14:30 Beijing Time.

## Technical Conversations:

* Duplex Method: If downlink is not required then we can use low frequency decimation clock synchronization in the tag, as the frequency of downlink subcarrier is 40KHz, Modulation Index=10%, Data rate=10Kbps, change the phase of 40KHz subcarrier is recommended. Gen2 downlink is encoded by PIE encoding, reference of the clock makes synchronization complicated. Demodulate STRM(Stop) command. We adjust the DCO. If we use subcarrier for continuous clocking for the tag, we don't need STRM(Start). If it is possible to transmit the subcarrier, we will use it for calibrating DCO. We agreed for subcarrier for synchronization, when tag is backscattering (Lowest subcarrier frequency is 100Hz). At the point of match state of backscatter, the incoming signal gives 100KHz sampling frequency. Nyquist frequency is 50Khz. If we produce 40KHz subcarrier, it will produce noise. Bit rate is 4 times less than the STRM(Stop). If we reduce subcarrier to 10KHz, STRM(Start) can be  eliminated or for the safe side we can use STRM(Start). In previous implementation of integer multiple so that tag can process 1 Byte, Frame end of 4 bits after CRC would be implemented. We are using NRZ coding.

* Jupiter2 specification: The upgrade of previous MSMA chip i.e. J2 MSMA excludes internal sensor and analog sensor whereas J2 Sensor consists of Analog sensor and MEMS Sensor. In J2 sensor, SPI Sensor + Analog sensor + Temp sensor are present through which the tag could select which data channel to choose. J2 MSMA directly handles ADXL-362. Additionally, we can have MEMS Sensor. Quanray would work on making two packages with ADI Sensor and external sensor. 3 chips in one package to be installed consisting of J2 MSMA, J2 Sensor and ADI Sensor. Here, ADI Sensor can be multiaccessible. Different pin for ChipSelect is advisable. Share SPI Bus, switch ChipSelect, and differentiate one at a time. As the packaging of the chip is expensive, Quanray to design a package, compatible to the two Jupiter chips. 100 chips for ADI and 100 chips for external SPI sensor have been reserved. VDD BAP gives power to the RFIC External circuitry. External battery to provide power to RFIC & Sensor. RFIC power can be charged into an external rechargeable battery with an external voltage booster. If Super Cap is used, we don't require another chip. As the consumption of Voltage booster is high, a simple charge pump has been suggested by Keio. RFIC can provide clock, several 100Hz. Battery can be charged  with small power. This clock has to be a power clock. 
* Analog Sensor ADC: ADC capability for analog sensors, sampling rate is 4Ksps, bit resolution is 16bits. 14 bits possibility has to be explored. Reducing the over sampling ratio is recommended for better resolution. SAR needs to be cascaded. Quanray to increase sampling rate 4 times for 4 channel data resolution-> 12 bits x 1kbps = 48kbps. 
