# Regular MPW Meeting Logs - May 25th, 2021

###### tags: `Tag(Keio team, Quanray team)`

| Features | Data |
| ----------------|:----------------------- |
| Project: | MSMA LSI Tag Development|
| Facilitator: | Jin Mitsugi, Hao Min |
| Date: | May 25th, 2021 |
| Time: | 13:30-14:30 Beijing Time|
| Attendees: | Hao Min, Jin Mitsugi, Jiabin Zhou, Qingsong Zhang, Yuxiao Zhao, H. Takahashi, Yichao Zhang, Yu Lu, Heoran Lu, Vrishti Shersia |
| Logger: | Vrishti Shersia |

## :memo: Logs
## Action Items updates
* [cont] Quanray will provide a detailed simulation model and FPGA implementation for the Duplex method due on May 25th: Keio shared its analysis and simulation code for further analysis->open
* [cont] Modified FPC Design and Delivery: Quanray has sent 10 FPCs to E-garde. Another 50 tags are requested by e-gard (this is not a charter of this thread)->close
* [cont] Battery-Assisted mode examination: Keio will check another tags->open
* Keio still cannot come up with a good combination of commercial voltage booster and jupyter1 chip.
* [cont] Requirements to the new RFIC shall be clarified (Keio): View the updated Jupiter 2 spec. https://msma-prj.autoidlab.jp/attachments/394. Quanray to provide a plan on :
* Analog Sensor ADC: Equation of the sampling rate and no. of channels.
* The voltage translation between a battery assisted sensor and the RFIC needs to be clarified (higher voltage input can be accomodated by jupyter2 by using open drain)
* Quanray to check the possibility of whether the analog sensor could be supported by Jupiter2 with 4ksps with 16bits: 16bits @ 2MHz is possible. -> Detailed document was provided by Yu Lu for Keio's check.
* [cont] Quanray to try to buy and implement die of ADXL-362 from ADI to implement into the package: Keio recommends Quanray to give the chip to ADI for implementation and design the chip for the MEMS circuitry->open
* [cont] The process of contract through Toppan to be initiated in May->open
Toppan already contacted Quanray.
* [cont] Production and Delivery of Type-A PCBs(20): (refer Minutes of April 28th)->open

## Conclusions:

* Duplex method : Quanray has simulated the 10KHz subcarrier with favourable results. They are performing detailed circuit alteration based on this subcarrier. They will send the advancement report before the scheduled June 8th meeting.
* Keio will provide a written approval of 150 MSMA chips in E-garde project to permit Quanray to use the chips(50 for metal antenna, 50 for battery assisted tag in the second half of 2021. And spare 50)
* Quanray suggests to merge the improved version of J2- MSMA chip to produce a refined version of Jupiter2 spec.
* Analog Sensor ADC: Quanray has provided a document about the equation of sampling rate, no. of channels and resolution. Currently, they are working on simulating the ADC.
* Voltage Translation: External SPI sensor voltage is 3V. We provide Vdd. The RFIC can't accomodate 3 port o/p. Jupiter 2 sensor can accept voltage which is larger than Vdd. Other possibility is to use Open drain output and a pull up resistor externally. In the input pin(J2 chip), there is an ESD clamp diode inside the chip and a serial resistor should be used between the output pin of the sensor and the input pin of J2 chip. Chip 1V, locks at 1.6V or 1.7V. We don't need voltage translator. Also, bandwidth is limited.
* Toppan Contract: Contract features discussion are still in the pipeline.
* eqRN before WRITE: Major portion of subcarrier allocation using DCO_CTL is consumed by the collection of new RN16 everytime a DCO_CTL value is written. Keio inquires if it is possible to reuse a handle for repetitive writes, or reduce the number of Req_RN, eg., once in three WRITE commands?

## Next Meeting:

* June 8th, 2021 13:30-14:30 Beijing Time.

## Technical Conversations:

* RFIC Chip delivery would be at the end of Feb'22, as there is a backlog of chips to about 1.5-2 months. Based on this, Keio has relaxed the delivery date. Quanray would negotiate with the chip manufacturing factory.
* Jupiter 2 RFIC has been improved. Gen2 has one SPI bus and an external chip select. 2 chips can be used alternatively.