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tags: homework
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# Digital Circuit Design HW#6

## 6.7
> Draw the logic diagram of four-bit register with four D flip-flops and four $4\times 1$ multiplexers with mode selection input $s_1$ and $s_0$. The register operates according to the following function table.
>

| $s_1$ | $s_0$ | Register Operation |
|:-----:|:-----:|:------------------------------------------------ |
| 0 | 0 | No change |
| 1 | 0 | Complement the four outputs |
| 0 | 1 | Clear register to 0 (synchronous with the clock) |
| 1 | 1 | Load parallel data |


## 6.27

>Using JK flip-flops:

### a.

>Design a counter with the following repeated binary sequence: 0,1,2,3,4,5,6.

| Current State[2:0] | Next State[2:0] |
|:------------------:|:---------------:|
| 000 | 001 |
| 001 | 010 |
| 010 | 011 |
| 011 | 100 |
| 100 | 101 |
| 101 | 110 |
| 110 | 000 |


$J0=Q_1'+Q_2'$
$K0=1$
$J1=Q_0$
$K1=Q_0+Q_2$
$J2=Q_0Q_1$
$K2=Q_1$


### b.
>Draw the logic diagram of the counter.


## 6.30

>How many flip-flops will be required to design a MOD 12 Johnson counter? Tabulate the count sequence and find the Boolean terms of each of the 12 AND gate outputs. Determine the number of unused states.

6 flip-flops

| clk tick | state |
| -------- | ------ |
| 0 | 000000 |
| 1 | 000001 |
| 2 | 000011 |
| 3 | 000111 |
| 4 | 001111 |
| 5 | 011111 |
| 6 | 111111 |
| 7 | 111110 |
| 8 | 111100 |
| 9 | 111000 |
| 10 | 110000 |
| 11 | 100000 |

unused states: $2^6-12=52$