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# System prepended metadata

title: Computer Organization 筆記

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###### tags: ClassNotes

Computer Organization 筆記
===

First midterm keypoints
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- [ ] **All computers consist of five components:**
(1) datapath and (2) control(3) Memory(4) Input devices and (5) output devices

- [ ] **Characteristics of servers**
(1)Availability(2)Scalability(3)Throughput

- [ ] **Amdahl's Law**
Execution Time After Improvement = Execution Time Unaffected + ( Execution Time Affacted / Amount of Improvement )

- [ ] **CPU Power Consumption**
Power ∝ 1/2 Capacitiveload * voltage^2 * Frequency switched

- [ ] **R-format 中 opcode 與 funct 是用來辦別是何 instruction 用的為何不將兩者合併為一個 12-bit field?**
Ans:
為了讓 R-format 與 I-format 越接近越好，opcode 與 funct 分開能讓 R-format 與 Iformat 都有 opcode、rs、rt 三個相同的 field

- [ ] **請說明為何 R-Type Instruction 中其指令格式的 shamt 僅要 5-bits? (已知 shamt用於 sll, srl)**
Ans:
我們都知道在 MIPS 裡面一個 register 總共也就只有 32 個 bit，當我們要 shift 的數量超過 31 個 bit 其實是沒有任何意義的，因為所有的資料都 shift 光了，這也就是為什麼，我們總共只需要用 5 個 bit 就可以明確的去描述我們所需要 shift 的個數

- [ ] **MIPS only supports these => simple is fast**
![](https://i.imgur.com/OxMPsjO.png)

- [ ] **MIPS Assembly Language**
![](https://i.imgur.com/Bu4JlB4.png)

- [ ] **Chapter 2 Fallacy and pitfall**

**More powerful instructions mean higher performance**
* Intel prefix instructions, memory-to-memory moves, 40MB/sec
* Standard load data into reg , isters, 60 MB/sec
* Standard load data into floating-point registers , 80 MB/sec

**Write in assembly language to obtain the highest 
performance**
* Assembly programmers need to understand pipelining and memory hierarchy
* Compiler knowledge
* Today’s C compiler are better
* Longer cycle for assembly programming in coding and debugging 

**he importance of commercial binary compatibility 
means successful instruction sets don’t change**


**Forgetting that sequential word addresses in 
machines with byte addressing do not differ by one**

**Using a pointer to an automatic variable outside its defining procedure**

- [ ] **Chapter 1 Fallacy and pitfall**

**Using a subset of the performance equation as a 
performance metric**

* Million instructions per second (MIPS) is a measure of microprocessor speed.
* MIPS = Instruction count / (Execution time * 10^6)

**However, MIPS is useful only among processors with the same instruction set, as different instruction sets often take different numbers of instructions to do the same job.**

**Using MIPS as a performance metric**
* MIPS specifies the instruction count
* MIPS varies between programs on the same computer
* MIPS can vary inversely with performance

- [ ] **Chapter 3 Fallacy and pitfall**

**Just as a le% shi% instruction can replace an integer multiply by a power of 2, a right shi% is the same as an integer division by a power of 2.**
Shi#ing the bits of c right by n bits would seem to be the same as dividing by 2n. And this is true for unsigned integers. "e problem is with signed integers. For example, suppose we want to divide −5ten by 4ten; the quotient should be −1ten. 

**Parallel execution strategies that work for integer data types also work for floating-point data types.**

This is assumption holds for two’s complement integers, since integer addition is associative. However, since floating-point addition is not associative, the assumption does not hold

**Only theoretical mathematicians care about Floating-point accuracy.**

