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# System prepended metadata

title: 作業系統 ch9 Main Memory
tags: [作業系統]

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tags: 作業系統
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# 作業系統 ch9 Main Memory

### 基本概念

- CPU register -> cache -> main memory, three type CPU can access directly
- stall: cycles, main memory too slow
- register access: CPU a clock time ( or less)
- memory unit: (address, read request)、(data, write request)
- program must be load into memory => then execute by CPU
    - ![](https://i.imgur.com/5LqDV8U.png)

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### address binding
- input queue 
    - 準備進入 Memory
    - load into 0000 (depend on PC)

- addreess of diff stages
    - source code ( symbolic )
    - compiler ( relocation address )
    - linker \ loader ( absoult address )

- bind in diff time
    - compile time
        - priori: absoult code
        - other program load -> recompile memory address
    - load time
        - relocate, if memory location not known at compile time
    - execution time
        - binding delay 
        - hardware support (Base and Limit registers)
            a. logical address 
            b. hardware protection

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### address space
- address type
    - logical (virtual) address: generate by CPU
    - physical address: memory unit use

- address space
    - address generate by program

- logical and physical address diff in load / run time address-binding scheme

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### Memory management unit ( MMU )
- hardware
- map logical -> physical address
- base register (relocation register、4)
- user mode use logical address

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### dynamic relocation use relocation register
- load routine when called
- don't need special support from OS
![](https://i.imgur.com/9Rr4xV9.png)

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### Dynamic linking (shared lib)
- linking in executetion time
- stub (一段 code): find address of memory-resident lib routine, stub 將自已跟 routine 交換
- patch system lib
- versioning, 需要 OS support

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### Dynamic loading
- user 自行規劃, 不由 OS 負責
- 古老方法

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### swapping
- memory ->(swap) -> back store
- backing store
    - fast disk
    - DMA to memory image
- roll in, roll out (priority)
- swap time -> transfer time -> amount of memory swap
- ready queue(have memory image in disk)
- can load in diff original position? A: yes if dynamic binding

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### context swap
- problem : pending I/O swap out case error
    - can't swap out process which use I/O
    - transfer I/O to kernel space (double buffering)

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### swap in mobile 
- no support swap, because flash memory
- both support paging
- ios
    - 自願放棄 (voluntarily relinquish)
    - throw out read-only data
    - termination if fail to free

- Android
    - termination if low free memory, write application state for fast restart

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### contiguous allocation
- Main memory support user and OS process, each include a single section
- two partition
    - kernal process(resident OS): low memory, interrupt vector
    - user process: high memory

- relocation register 
    - base: smallest physical address
    - limit register: logical address must be less than the limit register
    - MMU maps logical address dynamic
    - kernal code transient, kernal change size
![](https://i.imgur.com/WVTvIzs.png)



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### multiple partition allocation
- degree: number of partition
- partition with different size, continuous memory
- hole: available memory
- OS record some information
    - a. allocated partition
    - b. free partition(hole)
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### dynamic allocation ways
- first fit
- best fit
- worst fit(largest)

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### Fragmentation
- external fragmentation
    - reduce by compaction : must be dynamic binding, done at execution time (shuffle memory content) 
- internal fragmentation

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### Segmentation
- user view of memory
- a segment = logic unit
- no internal fragmentation
- each process have segment table, map physical address
    - base、limit
    - segment table base register、segment table length register(check segment number < STLR)
- logic address < segment number, offset>
- protection: validation bit、privilege

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### Page
- physical memory(frame)、logic memory(page)
- track all free frame
- page table
    - each process have one page table
    - save in main memory
    - logical -> (page table) -> physical memory    
    - logic address <page number(page table index), offset>
    - PTBR、PTLR
    - twice memory access
    - TLB(translate lookaside buffer): store address-space identifier(ASIDs), like cache
    - 計算 Effective Access Time： hit:seach+acess*1, miss: search+acess*2
    - associative memory(parallel search)
    ![](https://i.imgur.com/MqPwwSq.png)

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### Memory Protection
- protection bit(R、RW)
- valid-invalid bit( can use PTLR )
- illegel -> trap to kernal

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### Share page
- share code reentrant
    - use in interprocess communication
- private code 
    - each process have a copy

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### structure of page table
- hierarchical paging
    - 32 bit (12, 10, 10 => outer, inner page number, offset)
    - multiple page table
    - two-level (forward-mapped)=> outer、inner
- hashed page table 
    - \>32 bit
    - useful for sparse address
    - virtual page number
- inverted page table
    - track physical address
    - one page、frame have one entry in page table
    - < PID, page number >

