---
# System prepended metadata

title: '[DaCe] CPU target for GT4Py backend'
tags: [shaping-archive]

---

# [DaCe] CPU target for GT4Py backend

###### tags: `cycle 18` <!-- Change to the current cycle number -->

- Shaped by: Edoardo
- Appetite (FTEs, weeks): 2
- Developers: <!-- Filled in at the betting table unless someone is specifically required here -->

## Problem
<!-- The raw idea, a use case, or something we’ve seen that motivates us to work on this -->
This pitch is a placeholder to advance the support of icon4py stencils on the DaCe backend. The CPU target is the default platform for testing and integration.

Apart from 2 open PRs from cycle 17, an activity left is to enable DaCe auto-optimize heuristics on the SDFG. Some issue was found in DaCe related to array reshape in refinement of nested accesses, which needs further investigation and proper fix.


## Appetite
<!-- Explain how much time we want to spend and how that constrains the solution -->

## Solution
<!-- The core elements we came up with, presented in a form that’s easy for people to immediately understand -->
It must be noted that the work in the DaCe backend is a continuous work-in-progress, because the design objective was not to support the entire ITIR, but only the lowering paths through ITIR that allow to run the icon4py stencils. Therefore, the DaCe backend needs to be updated when functionality is introduced in new stencils or the generation of ITIR changes.

## Rabbit holes
<!-- Details about the solution worth calling out to avoid problems -->

## No-gos
<!-- Anything specifically excluded from the concept: functionality or use cases we intentionally aren’t covering to fit the ## appetite or make the problem tractable -->
