# 作品集
這邊記錄了我本人實作過的電路專案，並且依據ASIC Design Flow 以及 FPGA System Implementaion來進行分類。
當中除了不能公開的項目(例如產學案、DeltaMOOCX所使用之專案範例教材)等等，其餘的
Design File 我都盡量更新在本人的 GitHub 專頁當中，歡迎點選下方的Link查看。
GitHub Link： [ GitHub Link ](https://github.com/MYNAMEHOLO)
## ASIC Design Flow
| ASIC Porject name | Cell Area | Setup Time |等級 | 備註 |
| -------------- | --------- | ----------- |--- | -----------|
| Decimation | N/A | N/A |--- | ITRI 計畫 |
| Interporlation | N/A | N/A |--- | ITRI 計畫 |
| fx_pt_add | 1722 | --- |--- | SIP 課程 |
| SPU (Simple Processing Unit) | 17011 | 10.52|--- | SIP 課程|
| QPSK BaseBand | 37434 | 10.73|--- | 通訊積體電路設計 課程|
| ALU | N/A | N/A |--- | NTU CVSD HW1 |
| ICCONTEST_2018(uni) | 78480 | 10.11 |A | LCD CTRL 電路 |
| ICCONTEST_2016(pre) | 9984 | 6.18 |A | Local Binary Pattern (LBP電路)|
| ICCONTEST_2015(pre) |7064|8.09|A|圓心涵蓋點偵測電路|
| ICCONTEST_2017(pre) |11645|10.19|A|D.T. (距離變換電路)|
| ICCONTEST_2014(pre) | 6302 | 10.17 |A | Serial Transmitter Interface + Data Arrange Controller 電路|
| ICCONTEST_2019(pre) | 159568 | 10.15 |S | Convolution 電路 |

## FPGA Implement Flow
| FPGA Porject name | Cell Area | Setup Time |等級 | 備註 |
| -------------- | --------- | ----------- |--- | -----------|
| CSA | N/A | N/A |--- | FPGA Implement With DE-0 |
| RCA | N/A | N/A |--- | FPGA Implement With DE-0 |
| 簡易計算機 | N/A | N/A |--- | FPGA Implement With DE-0 |
| 閃爍燈電路 | N/A | N/A |--- | FPGA Implement With DE-0 |
| PWM 跑馬流水燈電路 | N/A | N/A |--- | FPGA Implement With DE-0 |
| 蛇行燈電路 | N/A | N/A |--- | FPGA Implement With DE-0 |
| 紅綠燈電路 | N/A | N/A |--- | FPGA Implement With DE-0 |
| VGA 實驗 | N/A | N/A |--- | FPGA Implement With DE-0 |
| MAC 架構實驗 | N/A | N/A |--- | FPGA Implement With DE-0 |
| HDMI小遊戲 | N/A | N/A |--- | Xilinx Zynq-Z2 |
| HLS Practice | N/A | N/A |--- | Xilinx Zynq-Z2 |
| Sequence Detecting by AXI Protocol | N/A | N/A |--- | Xilinx Zynq-Z2 |

# English Version
# 作品集
這邊記錄了我本人實作過的電路專案，並且依據ASIC Design Flow 以及 FPGA System Implementaion來進行分類。
當中除了不能公開的項目(例如產學案、DeltaMOOCX所使用之專案範例教材)等等，其餘的
Design File 我都盡量更新在本人的 GitHub 專頁當中，歡迎點選下方的Link查看。
GitHub Link： [ GitHub Link ](https://github.com/MYNAMEHOLO)
## ASIC Design Flow
| ASIC Porject name | Cell Area | Setup Time |等級 | 備註 |
| -------------- | --------- | ----------- |--- | -----------|
| Decimation | N/A | N/A |--- | ITRI Intern Project |
| Interporlation | N/A | N/A |--- | ITRI Intern Project |
| fx_pt_add | 1722 | --- |--- | Silicon IP Course |
| SPU (Simple Processing Unit) | 17011 | 10.52|--- | Silicon IP Course|
| QPSK BaseBand | 37434 | 10.73|--- | Communacation Circuit Design Course|
| ALU | N/A | N/A |--- | NTU CVSD HW1 |
| ICCONTEST_2018(uni) | 78480 | 10.11 |A | LCD CTRL Circuit |
| ICCONTEST_2016(pre) | 9984 | 6.18 |A | Local Binary Pattern Implementation|
| ICCONTEST_2015(pre) |7064|8.09|A|Center-covered point detection circuit|
| ICCONTEST_2017(pre) |11645|10.19|A|Distance Transform Implementation|
| ICCONTEST_2014(pre) | 6302 | 10.17 |A | Serial Transmitter Interface + Data Arrange Controller Circuit Design|
| ICCONTEST_2019(pre) | 159568 | 10.15 |S | Convolution Circuit |

## FPGA Implement Flow
| FPGA Porject name | Cell Area | Setup Time |等級 | 備註 |
| -------------- | --------- | ----------- |--- | -----------|
| CSA | N/A | N/A |--- | FPGA Implement With DE-0 |
| RCA | N/A | N/A |--- | FPGA Implement With DE-0 |
| Vending Machine Game | N/A | N/A |--- | FPGA Implement With DE-0 |
| Flashing Light | N/A | N/A |--- | FPGA Implement With DE-0 |
| Marquee lights Implement with PWM method | N/A | N/A |--- | FPGA Implement With DE-0 |
| snake lights | N/A | N/A |--- | FPGA Implement With DE-0 |
| Traffic Light | N/A | N/A |--- | FPGA Implement With DE-0 |
| Image Display using VGA protocol | N/A | N/A |--- | FPGA Implement With DE-0 |
| MAC | N/A | N/A |--- | FPGA Implement With DE-0 |
| Design a game and out with HDMI protocol to screen display | N/A | N/A |--- | Xilinx Zynq-Z2 |
| HLS Practice | N/A | N/A |--- | Xilinx Zynq-Z2 |