MX6412J GPIO Programming Guide
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1. GPIO Header of [MX6412J](https://www.bcmcom.com/bcm_product_MX6412J.html)
|Function |Pin |Pin|Function |
| :---: | :---: | :---: |:---: |
|VCC |1 | 2 | GND|
|GPIO01 |3 | 4 | GPIO05 |
|GPIO02 |5 | 6 | GPIO06 |
|GPIO03 |7 | 8 | GPIO07 |
|GPIO04 |9 | 10 | GPIO08 |

2. Nuvoton NCT6126D
-- Dwonload Datasheet and Programming Guide.
-- I/O port: 2E/2Fh
-- section 7.1 (p.52) Confgiuration Sequence
-- Unlock code: 0x87
-- Exit code: 0xAA

2.1 Mapping to NCT6126D GP4X
-- Reg F0h: 0 = output, 1 = input (default)
-- Reg F1h: data register

|GPIO Header |NCT6126D Pin# |Reg F0/F1h|
| :---: | :---: | :---: |
|GPIO01 |GP47 | bit7 |
|GPIO02 |GP42 | bit2 |
|GPIO03 |GP41 | bit1 |
|GPIO04 |GP40 | bit0 |

2.2 Mapping to NCT6126D GP3X
-- Reg ECh: 0 = output, 1 = input (default)
-- Reg EDh: data register

|GPIO Header |NCT6126D Pin# |Reg EC/EDh|
| :---: | :---: | :---: |
|GPIO05 |GP37 | bit7 |
|GPIO06 |GP36 | bit6 |
|GPIO07 |GP35 | bit5 |
|GPIO08 |GP34 | bit4 |

3. Sample code

#include <stdio.h>
#include <sys/io.h>

#define SIO_INDEX 0x2E
#define SIO_DATA 0x2F

void sio_unlock()
{
    outb(0x87, SIO_INDEX);
    outb(0x87, SIO_INDEX);
}

void sio_lock()
{
    outb(0xAA, SIO_INDEX);
}

void sio_ldn(unsigned char ldn)
{
    outb(0x7, SIO_INDEX);
    outb(ldn, SIO_DATA);
}

void sio_write_reg(unsigned char reg, unsigned char val)
{
    outb(reg, SIO_INDEX);
    outb(val, SIO_DATA);
}

unsigned char sio_read_reg(unsigned char reg)
{
    outb(reg, SIO_INDEX);
    return inb(SIO_DATA);
}

void config_gpio01()
{
    // change to LDN7
    sio_ldn(0x7);
  
    // Set GP47 as output (clear bit7)
    sio_write_reg(0xF0, sio_read_reg(0xF0) & ~(1 << 7));
}

void config_gpio(int pin)
{
    // change to LDN7
    sio_ldn(0x7);

    switch(pin){
    case 1:
        // Set GP47 as output (clear bit7)
        sio_write_reg(0xF0, sio_read_reg(0xF0) & ~(1 << 7));
        break;
    case 2:
        // Set GP42 as output (clear bit2)
        sio_write_reg(0xF0, sio_read_reg(0xF0) & ~(1 << 2));
        break;
    case 3:
        // Set GP41 as output (clear bit1)
        sio_write_reg(0xF0, sio_read_reg(0xF0) & ~(1 << 1));
        break;
    case 4:
        // Set GP40 as output (clear bit0)
        sio_write_reg(0xF0, sio_read_reg(0xF0) & ~(1 << 0));
        break;
    case 5:
        // Set GP37 as output (clear bit7)
        sio_write_reg(0xEC, sio_read_reg(0xEC) & ~(1 << 7));
        break;
    case 6:
        // Set GP36 as output (clear bit6)
        sio_write_reg(0xEC, sio_read_reg(0xEC) & ~(1 << 6));
        break;
    case 7:
        // Set GP35 as output (clear bit5)
        sio_write_reg(0xEC, sio_read_reg(0xEC) & ~(1 << 5));
        break;
    case 8:
        // Set GP34 as output (clear bit4)
        sio_write_reg(0xEC, sio_read_reg(0xEC) & ~(1 << 4));
        break;

    }
}

void write_gpio01(int val)
{
    if (val)
    {
        // set to high
        sio_write_reg(0xF1, sio_read_reg(0xF1) | (1 << 7));
    }
    else
    {
        // set to low
        sio_write_reg(0xF1, sio_read_reg(0xF1) & ~(1 << 7));
    }
}

void write_gpio(int pin, int val)
{
    if (val)
    {
        // set to high
        switch(pin){
        case 1:
            sio_write_reg(0xF1, sio_read_reg(0xF1) | (1 << 7));
            break;
        case 2:
            sio_write_reg(0xF1, sio_read_reg(0xF1) | (1 << 2));
            break;
        case 3:
            sio_write_reg(0xF1, sio_read_reg(0xF1) | (1 << 1));
            break;
        case 4:
            sio_write_reg(0xF1, sio_read_reg(0xF1) | (1 << 0));
            break;
        case 5:
            sio_write_reg(0xED, sio_read_reg(0xED) | (1 << 7));
            break;
        case 6:
            sio_write_reg(0xED, sio_read_reg(0xED) | (1 << 6));
            break;
        case 7:
            sio_write_reg(0xED, sio_read_reg(0xED) | (1 << 5));
            break;
        case 8:
            sio_write_reg(0xED, sio_read_reg(0xED) | (1 << 4));
            break;
        }
        
    }
    else
    {
        // set to low
        switch(pin){
        case 1:
            sio_write_reg(0xF1, sio_read_reg(0xF1) & ~(1 << 7));
            break;
        case 2:
            sio_write_reg(0xF1, sio_read_reg(0xF1) & ~(1 << 2));
            break;
        case 3:
            sio_write_reg(0xF1, sio_read_reg(0xF1) & ~(1 << 1));
            break;
        case 4:
            sio_write_reg(0xF1, sio_read_reg(0xF1) & ~(1 << 0));
            break;
        case 5:
            sio_write_reg(0xED, sio_read_reg(0xED) & ~(1 << 7));
            break;
        case 6:
            sio_write_reg(0xED, sio_read_reg(0xED) & ~(1 << 6));
            break;
        case 7:
            sio_write_reg(0xED, sio_read_reg(0xED) & ~(1 << 5));
            break;
        case 8:
            sio_write_reg(0xED, sio_read_reg(0xED) & ~(1 << 4));
            break;
            }
    }
}

int main()
{
    iopl(3);
    // Unlock NCT6126D
    sio_unlock();

    for (int i = 1; i <= 8; i++){
        // Enable GPIO
        config_gpio(i);
        
        printf("Set GPIO0%d to high\n", i);
        write_gpio(i, 1);
        
        printf("Press Enter to continue\n");
        while (getchar() != '\n');
        
        printf("Set GPIO0%d to low\n", i);
        write_gpio(i, 0);

        printf("Press Enter to continue\n");
        while (getchar() != '\n');
    }

    // lock NCT6126
    sio_lock();
    
    return 0;
}

###### tags: `gpio` `MX6412J`