# Assignment2: RISC-V Toolchain
contributed by < [fewletter](https://github.com/fewletter/CAHW/tree/main/HW2) >
## Selected Topic & Motivation
Selected Topic:
* [Implement unsigned int mul by count leading zero](https://hackmd.io/@yAB_kQtlST6mqZV2uCHm3Q/ByhYzQhga)
* Contributed by [陳彥佑](https://hackmd.io/@yAB_kQtlST6mqZV2uCHm3Q)
Motivation:
* I want to see the implement of multiplication without using the RV32M assembly code, and how do other person deal with the overflow of the 32bit register.
## Compile code by RISC-V GNU Toolchain
Original code:
```c
#include <stdint.h>
#include <stdio.h>
#include <inttypes.h>
uint16_t CLZ_32(uint32_t x)
{
x |= (x >> 1);
x |= (x >> 2);
x |= (x >> 4);
x |= (x >> 8);
x |= (x >> 16);
x -= ((x >> 1) & 0x55555555);
x = ((x >> 2) & 0x33333333) + (x & 0x33333333);
x = ((x >> 4) + x) & 0x0f0f0f0f;
x += (x >> 8);
x += (x >> 16);
return (32 - (x & 0x3f));
}
uint64_t efficient_int_mul(uint32_t A, uint32_t B) {
uint16_t n = CLZ_32(A);
uint16_t m = CLZ_32(B);
uint16_t result_bits;
if(n>m)
result_bits = n;
else{
result_bits = m;
uint32_t temp = A;
A = B;
B = temp;
}
uint64_t result = 0;
for (int i = 0; i < 32-result_bits; i++) {
if ((A >> i) & 1) {
result += ((uint64_t)B << i);
}
}
return result;
}
int main() {
uint32_t A = 0x12345678;
uint32_t B = 0xffffdddd;
uint64_t result = efficient_int_mul(A, B);
printf("uint64: %"PRIX64"\n", result);
return 0;
}
```
Compile C code by RISC-V GNU Toolchain using the command below.
```shell
$ riscv-none-elf-gcc -Wall -march=rv32i -mabi=ilp32 target/unsigned_int_mul.c -o target/unsigned_int_mul.elf
```
Use RISC-V GNU Toolchain to show the information of the elf file.
```shell
$ riscv-none-elf-size target/unsigned_int_mul.elf
text data bss dec hex filename
76000 2320 1528 79848 137e8 target/unsigned_int_mul.elf
$ riscv-none-elf-readelf -h target/unsigned_int_mul.elf
ELF Header:
Magic: 7f 45 4c 46 01 01 01 00 00 00 00 00 00 00 00 00
Class: ELF32
Data: 2's complement, little endian
Version: 1 (current)
OS/ABI: UNIX - System V
ABI Version: 0
Type: EXEC (Executable file)
Machine: RISC-V
Version: 0x1
Entry point address: 0x100d8
Start of program headers: 52 (bytes into file)
Start of section headers: 94544 (bytes into file)
Flags: 0x0
Size of this header: 52 (bytes)
Size of program headers: 32 (bytes)
Number of program headers: 3
Size of section headers: 40 (bytes)
Number of section headers: 15
Section header string table index: 14
$ riscv-none-elf-objdump -d target/unsigned_int_mul.elf
...
00021b20 <__clzsi2>:
21b20: 000107b7 lui a5,0x10
21b24: 02f57a63 bgeu a0,a5,21b58 <__clzsi2+0x38>
21b28: 10053793 sltiu a5,a0,256
21b2c: 0017b793 seqz a5,a5
21b30: 00379793 sll a5,a5,0x3
21b34: 02000713 li a4,32
21b38: 40f70733 sub a4,a4,a5
21b3c: 00f55533 srl a0,a0,a5
21b40: 00001797 auipc a5,0x1
21b44: d3478793 add a5,a5,-716 # 22874 <__clz_tab>
21b48: 00a787b3 add a5,a5,a0
21b4c: 0007c503 lbu a0,0(a5)
21b50: 40a70533 sub a0,a4,a0
21b54: 00008067 ret
21b58: 010007b7 lui a5,0x1000
21b5c: 02f57463 bgeu a0,a5,21b84 <__clzsi2+0x64>
21b60: 01000793 li a5,16
21b64: 00f55533 srl a0,a0,a5
21b68: 00001797 auipc a5,0x1
21b6c: d0c78793 add a5,a5,-756 # 22874 <__clz_tab>
21b70: 00a787b3 add a5,a5,a0
21b74: 0007c503 lbu a0,0(a5)
21b78: 01000713 li a4,16
21b7c: 40a70533 sub a0,a4,a0
21b80: 00008067 ret
21b84: 01800793 li a5,24
21b88: 00f55533 srl a0,a0,a5
21b8c: 00001797 auipc a5,0x1
21b90: ce878793 add a5,a5,-792 # 22874 <__clz_tab>
21b94: 00a787b3 add a5,a5,a0
21b98: 0007c503 lbu a0,0(a5)
21b9c: 00800713 li a4,8
21ba0: 40a70533 sub a0,a4,a0
21ba4: 00008067 ret
```
## Generate ELF file from Assembly code using RISC-V Toolchain
The elf file needs three things to generate the elf file from the assembly code. First one is the assembly code which is the `.s` file, the second one is the linker script, and the third one is object file compiled by the assembly file.
### ld file
The ld file shows how the assembly code execute. The `_start` means that your assembly code has to start with the section `_start` or you will encounter the following error.
```shell
fewletter@fewletter:~/linux_kernel/rv32emu/tests/target$ make
riscv-none-elf-as -R -march=rv32i -mabi=ilp32 -o mul_clz.o mul_clz.S
riscv-none-elf-ld -o mul_clz.elf -T mul_clz.ld --oformat=elf32-littleriscv mul_clz.o
riscv-none-elf-ld: warning: cannot find entry symbol _start; defaulting to 00000000
```
The ld file can be found under the directory `tests/asm-hello`.
### Assembly code
:::spoiler The original assembly code
```
.data
data_1: .word 0x12345678
data_2: .word 0xffffdddd
mask_1: .word 0x55555555
mask_2: .word 0x33333333
mask_3: .word 0x0f0f0f0f
.text
main:
lw s0, data_1 #s0 = A
lw s1, data_2 #s1 = B
mv a0, s0
jal ra, CLZ
mv t5, a0 #A's CLZ -> t5
mv a0, s1
jal ra, CLZ
mv t6, a0 #B's CLZ -> t6
slt t0, t5, t6 # if A's zero less than B's, t0=1
li a0, 32
bne t0, zero, start_mul
mv t0,s0
mv s0, s1
mv s1, t0
mv t6, t5
start_mul:
#reset
sub a0, a0, t6
li t0, 0
li t1, 0
li t2, 0
li s2, 0 #s2: high 32 of number
li s3, 0 #s3: low 32 of number
li s4, 0 #used to check how many bit should shift
int_mul:
slt t1, s4, a0
beq t1, zero, exit
srl t0, s1, s4
andi t0, t0, 0x00000001 #check B's rightest bit
beq t0, zero, skip #if(rightest bit is zero) jump
sll s5,s0,s4 #s0 is A,S5 the low bit i want
li t2, 32
sub t2, t2, s4
srl s6, s0, t2 #s0 is A, S6 the high bit i want
add s7, s3, s5 #s7 is 32_low + low bit i want
jal overflow_detect_function
no_overflow:
add s2, s2, s6
jal skip
skip:
addi s4, s4 ,1
jal int_mul
overflow_detect_function:
sltu t3, s7, s3
mv s3, s7
beq t3, zero, no_overflow
# if not jump --> overflow
add s2, s2, s6
addi s2, s2, 1
addi s4, s4 ,1
jal int_mul
CLZ:
#a0: the num(x) you want to count CLZ
#t0: shifted x
srli t0, a0, 1 # t0 = x >> 1
or a0, a0, t0 # x |= x >> 1
srli t0, a0, 2 # t0 = x >> 2
or a0, a0, t0 # x |= x >> 2
srli t0, a0, 4 # t0 = x >> 4
or a0, a0, t0 # x |= x >> 4
srli t0, a0, 8 # t0 = x >> 8
or a0, a0, t0 # x |= x >> 8
srli t0, a0, 16 # t0 = x >> 16
or a0, a0, t0 # x |= x >> 16
#start_mask
lw t2, mask_1
srli t0, a0, 1 # t0 = x >> 1
and t1, t0, t2 # t1 = (x >> 1) & mask1
sub a0, a0, t1 # x -= ((x >> 1) & mask1)
lw t2, mask_2 # load mask2 to t2
srli t0, a0, 2 # t0 = x >> 2
and t1, t0, t2 # (x >> 2) & mask2
and a0, a0, t2 # x & mask2
add a0, t1, a0 # ((x >> 2) & mask2) + (x & mask2)
srli t0, a0, 4 # t0 = x >> 4
add a0, a0, t0 # x + (x >> 4)
lw t2, mask_3 # load mask3 to t2
and a0, a0, t2 # ((x >> 4) + x) & mask4
srli t0, a0, 8 # t0 = x >> 8
add a0, a0, t0 # x += (x >> 8)
srli t0, a0, 16 # t0 = x >> 16
add a0, a0, t0 # x += (x >> 16)
andi t0, a0, 0x3f # t0 = x & 0x3f
li a0, 32 # a0 = 32
sub a0, a0, t0 # 32 - (x & 0x3f)
ret
exit:
li a7,10
ecall
```
:::
Since the simulator Ripes and the rv32emu have different syscalls, the original assembly code should be modify to the following assembly code. The `SYSEXIT` is needed to exit the code or the function, and the number 93 can be found in [rv32emu/src/syscall.c](https://github.com/sysprog21/rv32emu/blob/master/src/syscall.c).
```
.org 0
# Provide program starting address to linker
.global _start
/* newlib system calls */
.set SYSEXIT, 93
.data
data_1: .word 0x12345678
data_2: .word 0xffffdddd
mask_1: .word 0x55555555
mask_2: .word 0x33333333
mask_3: .word 0x0f0f0f0f
.text
_start:
lw s0, data_1 #s0 = A
lw s1, data_2 #s1 = B
mv a0, s0
jal ra, CLZ
mv t5, a0 #A's CLZ -> t5
mv a0, s1
jal ra, CLZ
mv t6, a0 #B's CLZ -> t6
slt t0, t5, t6 # if A's zero less than B's, t0=1
li a0, 32
bne t0, zero, start_mul
mv t0,s0
mv s0, s1
mv s1, t0
mv t6, t5
li a7, SYSEXIT # "exit" syscall
add a0, zero, 0 # Use 0 return code
ecall # invoke syscall to terminate the program
start_mul:
#reset
sub a0, a0, t6
li t0, 0
li t1, 0
li t2, 0
li s2, 0 #s2: high 32 of number
li s3, 0 #s3: low 32 of number
li s4, 0 #used to check how many bit should shift
int_mul:
slt t1, s4, a0
beq t1, zero, exit
srl t0, s1, s4
andi t0, t0, 0x00000001 #check B's rightest bit
beq t0, zero, skip #if(rightest bit is zero) jump
sll s5,s0,s4 #s0 is A,S5 the low bit i want
li t2, 32
sub t2, t2, s4
srl s6, s0, t2 #s0 is A, S6 the high bit i want
add s7, s3, s5 #s7 is 32_low + low bit i want
jal overflow_detect_function
no_overflow:
add s2, s2, s6
jal skip
skip:
addi s4, s4 ,1
jal int_mul
overflow_detect_function:
sltu t3, s7, s3
mv s3, s7
beq t3, zero, no_overflow
# if not jump --> overflow
add s2, s2, s6
addi s2, s2, 1
addi s4, s4 ,1
jal int_mul
CLZ:
#a0: the num(x) you want to count CLZ
#t0: shifted x
srli t0, a0, 1 # t0 = x >> 1
or a0, a0, t0 # x |= x >> 1
srli t0, a0, 2 # t0 = x >> 2
or a0, a0, t0 # x |= x >> 2
srli t0, a0, 4 # t0 = x >> 4
or a0, a0, t0 # x |= x >> 4
srli t0, a0, 8 # t0 = x >> 8
or a0, a0, t0 # x |= x >> 8
srli t0, a0, 16 # t0 = x >> 16
or a0, a0, t0 # x |= x >> 16
#start_mask
lw t2, mask_1
srli t0, a0, 1 # t0 = x >> 1
and t1, t0, t2 # t1 = (x >> 1) & mask1
sub a0, a0, t1 # x -= ((x >> 1) & mask1)
lw t2, mask_2 # load mask2 to t2
srli t0, a0, 2 # t0 = x >> 2
and t1, t0, t2 # (x >> 2) & mask2
and a0, a0, t2 # x & mask2
add a0, t1, a0 # ((x >> 2) & mask2) + (x & mask2)
srli t0, a0, 4 # t0 = x >> 4
add a0, a0, t0 # x + (x >> 4)
lw t2, mask_3 # load mask3 to t2
and a0, a0, t2 # ((x >> 4) + x) & mask4
srli t0, a0, 8 # t0 = x >> 8
add a0, a0, t0 # x += (x >> 8)
srli t0, a0, 16 # t0 = x >> 16
add a0, a0, t0 # x += (x >> 16)
andi t0, a0, 0x3f # t0 = x & 0x3f
li a0, 32 # a0 = 32
sub a0, a0, t0 # 32 - (x & 0x3f)
ret
exit:
li a7,SYSEXIT
ecall
```
### ELF file
After setting up the files above, the other step is to modify the Makefile to the target elf file. Finally, the elf file can be compiled.
```shell
fewletter@fewletter:~/linux_kernel/rv32emu/tests/target$ make
riscv-none-elf-as -R -march=rv32i -mabi=ilp32 -o mul_clz.o mul_clz.S
riscv-none-elf-ld -o mul_clz.elf -T mul_clz.ld --oformat=elf32-littleriscv mul_clz.o
```
And then execute it.
```shell
fewletter@fewletter:~/linux_kernel/rv32emu/tests/target$ ../../build/rv32emu mul_clz.elf
inferior exit code 0
```
Because I use 0 as the exit code in the assembly code, the result shows `inferior exit code 0`. In the case, the result shows fine because the original assembly code doesn't print anything.
### Print in HEX form
Since the rv32emu doesn't support `printf` in hex form, and the program has to verify the result in hex form. Therefore, I write a simple syscall to support in `printf` hex form.
```diff
#define SUPPORTED_SYSCALLS \
+ _(printfHEX, 31) \
_(close, 57) \
_(lseek, 62) \
_(read, 63) \
_(write, 64) \
_(fstat, 80) \
_(exit, 93) \
_(gettimeofday, 169) \
_(brk, 214) \
_(clock_gettime, 403) \
...
```
The code is to read the buffer in register `a1` and print in hex form.
```c
static void syscall_printfHEX(riscv_t *rv)
{
uint32_t buffer = rv_get_reg(rv, rv_reg_a1);
fprintf(stdout, "Hex form: %x\n", buffer);
rv_set_reg(rv, rv_reg_a0, 0);
}
```
The assembly code has to be modified to call the `prinfHEX`, and then load the word to the register `a1` to print the result.
```diff
/* newlib system calls */
.set SYSEXIT, 93
.set SYSWRITE, 64
+.set SYSPRINTFHEX, 31
...
exit:
+ addi sp, sp, -8
+ li a0, 1
+ sw s2, 0(sp)
+ lw a1, 0(sp)
+ li a7, SYSPRINTFHEX
+ addi sp, sp, 4
+ ecall
+ li a0, 1
+ sw s3, 0(sp)
+ lw a1, 0(sp)
+ li a7, SYSPRINTFHEX
+ addi sp, sp, 4
+ ecall
li a0, 0
li a7, SYSEXIT
ecall
```
The test result is showed as below, and the result is same as the output of the original code.
```shell
fewletter@fewletter:~/linux_kernel/rv32emu/tests/target$ ../../build/rv32emu mul_clz.elf
Hex form: 1234540a
Hex form: 8f5c3d98
inferior exit code 0
```
## Analysis
The size of the disassebly code is showed below.
```shell
fewletter@fewletter-Veriton-M4665G:~/linux_kernel/rv32emu/tests/target$ riscv-none-elf-size mul_clz.elf
text data bss dec hex filename
404 0 0 404 194 mul_clz.elf
```
Contrast the previous part which uses the RISC-V toolchain to generate the disassebly code, the size of the disassebly code difference between hand written assembly code and the RISC-V toolchain is huge.
| | handwritten | risc-v gcc |
|:--------------------:| ----------- | ---------- |
| disassebly code size | 404 | 76000 |
### Test different compilation options of RISC-V gcc
To test different compilation options of RISC-V gcc, it is curcial to implement function `get_cycles()` in both c program and assembly code.
```c
...
extern uint64_t get_cycles();
...
int main() {
uint32_t A = 0x12345678;
uint32_t B = 0xffffdddd;
uint64_t oldcount = get_cycles();
uint64_t result = efficient_int_mul(A, B);
uint64_t cyclecount = get_cycles() - oldcount;
printf("Cycles count: %lld\n", cyclecount);
printf("uint64: %"PRIX64"\n", result);
return 0;
}
```
The assembly code is taken from [perfcounter](https://github.com/sysprog21/rv32emu/tree/master/tests/perfcounter), it looks like the code below.
```
.text
.global get_cycles
.align 2
get_cycles:
csrr a1, cycleh
csrr a0, cycle
csrr a2, cycleh
bne a1, a2, get_cycles
ret
.size get_cycles,.-get_cycles
```
To compile the elf file of the c code, there are two requests must be fulfilled. The first one is to compile the assembly code `get_cycles` to object file and compile the c code to object file, and the second thing is to generate the elf file by these two object files.
```shell
fewletter@fewletter$ riscv-none-elf-gcc -march=rv32i_zicsr_zifencei -mabi=ilp32 -c getcycles.S -o getcycles.o
&& riscv-none-elf-gcc -march=rv32i_zicsr_zifencei -mabi=ilp32 -c mul_clz.c -o mul_clz.o
&& riscv-none-elf-gcc -march=rv32i_zicsr_zifencei -mabi=ilp32 -o mul_clz_gcc.elf mul_clz.o getcycles.o
&& ../../build/rv32emu mul_clz_gcc.elf
Cycles count: 394
uint64: 1234540A8F5C3D98
inferior exit code 0
```
In order to test all the compilation options more convenient, I write a script to make the c code and assembly code and compile in different optimizations.
```shell
#!/bin/bash
OUTPUTELF=mul_clz_gcc.elf
opt=( "-O0" "-O1" "-O2" "-O3" "-Os" "-Ofast" )
TOOLCHAIN=riscv-none-elf
RV32IISA=-march=rv32i_zicsr_zifencei
ILP32=-mabi=ilp32
function make_and_run() {
$TOOLCHAIN-gcc $RV32IISA $ILP32 -c getcycles.S -o getcycles.o
$TOOLCHAIN-gcc $RV32IISA $ILP32 $i -c mul_clz.c -o mul_clz.o
$TOOLCHAIN-gcc $RV32IISA $ILP32 -o $OUTPUTELF mul_clz.o getcycles.o
../../build/rv32emu $OUTPUTELF
}
function show() {
echo "Compilation Option : $i"
$TOOLCHAIN-size $OUTPUTELF
$TOOLCHAIN-readelf -h $OUTPUTELF >> analysis/relf$i.txt
$TOOLCHAIN-objdump -d $OUTPUTELF >> analysis/dump$i.txt
}
for i in "${opt[@]}"
do
make_and_run $i
show $i
echo ""
done
make clean
```
The result of the test
| Compilation Option | Cycle count | text size |
| ------------------ | ----------- |:---------:|
| O0 | 935 | 76144 |
| O1 | 394 | 75744 |
| O2 | 422 | 75740 |
| O3 | 399 | 75940 |
| Os | 531 | 75788 |
| Ofast | 399 | 75940 |
### Optimization of handwritten assembly code
#### Eliminate unused jump instruction
Let focus on the label `overflow_detect_function` of the original assembly code.
```=
...
int_mul:
slt t1, s4, a0
beq t1, zero, exit
srl t0, s1, s4
andi t0, t0, 0x00000001 #check B's rightest bit
beq t0, zero, skip #if(rightest bit is zero) jump
sll s5,s0,s4 #s0 is A,S5 the low bit i want
li t2, 32
sub t2, t2, s4
srl s6, s0, t2 #s0 is A, S6 the high bit i want
add s7, s3, s5 #s7 is 32_low + low bit i want
jal overflow_detect_function
no_overflow:
add s2, s2, s6
jal skip
skip:
addi s4, s4 ,1
jal int_mul
overflow_detect_function:
sltu t3, s7, s3
mv s3, s7
beq t3, zero, no_overflow
# if not jump --> overflow
add s2, s2, s6
addi s2, s2, 1
addi s4, s4 ,1
jal int_mul
...
```
In line 12, the code jump to the label `overflow_detect_function` to check if the overflow is detected, and in line 30, the code jump to the lable `int_mul` to start the loop again. The code cost some cycles in jump, so the modified code is to move the part `overflow_detect_function` to the label `int_mul`.
```diff
...
int_mul:
slt t1, s4, a0
beq t1, zero, exit
srl t0, s1, s4
andi t0, t0, 0x00000001 #check B's rightest bit
beq t0, zero, skip #if(rightest bit is zero) jump
sll s5,s0,s4 #s0 is A,S5 the low bit i want
li t2, 32
sub t2, t2, s4
srl s6, s0, t2 #s0 is A, S6 the high bit i want
add s7, s3, s5 #s7 is 32_low + low bit i want
- jal overflow_detect_function
+ sltu t3, s7, s3
+ mv s3, s7
+ beq t3, zero, no_overflow
+ # if not jump --> overflow
+ add s2, s2, s6
+ addi s2, s2, 1
+ addi s4, s4 ,1
+ jal int_mul
no_overflow:
add s2, s2, s6
jal skip
skip:
addi s4, s4 ,1
jal int_mul
...
```
**rv32emu**
Original version
```shell
fewletter@fewletter~/linux_kernel/rv32emu/tests/target$ make OPT=-o0
riscv-none-elf-as -o0 -R -march=rv32i_zicsr_zifencei -mabi=ilp32 -o mul_clz.o mul_clz.S
riscv-none-elf-ld -o0 -o mul_clz.elf -T mul_clz.ld --oformat=elf32-littleriscv mul_clz.o
../../build/rv32emu mul_clz.elf
H32b: 1234540a
L32b: 8f5c3d98
Cycle count: 367
```
Modified version
```shell
fewletter@fewletter~/linux_kernel/rv32emu/tests/target$ make OPT=-o0
riscv-none-elf-as -o0 -R -march=rv32i_zicsr_zifencei -mabi=ilp32 -o mul_clz.o mul_clz.S
riscv-none-elf-ld -o0 -o mul_clz.elf -T mul_clz.ld --oformat=elf32-littleriscv mul_clz.o
../../build/rv32emu mul_clz.elf
H32b: 1234540a
L32b: 8f5c3d98
Cycle count: 354
```
**Ripes**
Original version

Modified version

We can see the result above is that eliminate the additional jump instruction in the loop can decrease many cycles in the processor.
#### Loop unrolling
Loop unrolling is a common optimization of the program. The method is aims at increasing the program's execution speed, but the side effect of the the method is that will increase the text size of the assembly code. Besides it reduces the time cosuming in the waiting instructions in the processor.

> [Wikipedia - Branch predictor](https://en.wikipedia.org/wiki/Branch_predictor)
modified version
```diff
...
int_mul:
slt t1, s4, a0
beq t1, zero, exit
srl t0, s1, s4
andi t0, t0, 0x00000001 #check B's rightest bit
beq t0, zero, skip #if(rightest bit is zero) jump
sll s5,s0,s4 #s0 is A,S5 the low bit i want
li t2, 32
sub t2, t2, s4
srl s6, s0, t2 #s0 is A, S6 the high bit i want
add s7, s3, s5 #s7 is 32_low + low bit i want
sltu t3, s7, s3
mv s3, s7
beq t3, zero, no_overflow
# if not jump --> overflow
add s2, s2, s6
addi s2, s2, 1
addi s4, s4 ,1
# Loop unrolling 1
srl t0, s1, s4
andi t0, t0, 0x00000001
beq t0, zero, skip
sll s5,s0,s4
li t2, 32
sub t2, t2, s4
srl s6, s0, t2
add s7, s3, s5
sltu t3, s7, s3
mv s3, s7
beq t3, zero, no_overflow
# if not jump --> overflow
add s2, s2, s6
addi s2, s2, 1
addi s4, s4 ,1
jal int_mul
...
```
The test result
```shell
fewletter@fewletter~/linux_kernel/rv32emu/tests/target$ make OPT=-o0
riscv-none-elf-as -o0 -R -march=rv32i_zicsr_zifencei -mabi=ilp32 -o mul_clz.o mul_clz.S
riscv-none-elf-ld -o0 -o mul_clz.elf -T mul_clz.ld --oformat=elf32-littleriscv mul_clz.o
../../build/rv32emu mul_clz.elf
H32b: 1234540a
L32b: 8f5c3d98
Cycle count: 337
```
And I test how many unrolling loops can reach to the limit of its efficiency.
| loop unrolling times | Cycle count | text size |
|:-------------------- |:----------- |:--------- |
| 0 | 354 | 424 |
| 1 | 337 | 480 |
| 2 | 331 | 536 |
| 3 $\checkmark$ | 328 | 592 |
| 4 | 328 | 648 |
The result shows that even the loop unrolling can reduce the cycle count, but the text size of the elf file increases because of more unrolling loops are implemented.